| Message ID | 1499438347-2539-1-git-send-email-imre.deak@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jul 07, 2017 at 05:39:07PM +0300, Imre Deak wrote: > Check that all the power well IDs are unique on the given platform. > > v2: > - Fix using BIT_ULL() instead of BIT() for 64 bit mask. > > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 27c69f9..bc17d2f 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -2563,6 +2563,8 @@ static uint32_t get_allowed_dc_mask(const struct drm_i915_private *dev_priv, > int intel_power_domains_init(struct drm_i915_private *dev_priv) > { > struct i915_power_domains *power_domains = &dev_priv->power_domains; > + u64 power_well_ids; > + int i; > > i915.disable_power_well = sanitize_disable_power_well_option(dev_priv, > i915.disable_power_well); > @@ -2599,6 +2601,15 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) > set_power_wells(power_domains, i9xx_always_on_power_well); > } > > + power_well_ids = 0; > + for (i = 0; i < power_domains->power_well_count; i++) { > + enum i915_power_well_id id = power_domains->power_wells[i].id; > + > + WARN_ON(id >= sizeof(power_well_ids) * 8); > + WARN_ON(power_well_ids & BIT_ULL(id)); > + power_well_ids |= BIT_ULL(id); > + } Like Rodrigo, I was also worried about conflicting power well IDs, but this should at least give us a runtime warning. Compile time error would be nicer, but I guess there's no good way to do that. Maybe pull this code into a separate functions called assert_power_well_ids_unique() or something like that? That way you wouldn't have to actually read the code to figure out what it's doing. > + > return 0; > } > > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 27c69f9..bc17d2f 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -2563,6 +2563,8 @@ static uint32_t get_allowed_dc_mask(const struct drm_i915_private *dev_priv, int intel_power_domains_init(struct drm_i915_private *dev_priv) { struct i915_power_domains *power_domains = &dev_priv->power_domains; + u64 power_well_ids; + int i; i915.disable_power_well = sanitize_disable_power_well_option(dev_priv, i915.disable_power_well); @@ -2599,6 +2601,15 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) set_power_wells(power_domains, i9xx_always_on_power_well); } + power_well_ids = 0; + for (i = 0; i < power_domains->power_well_count; i++) { + enum i915_power_well_id id = power_domains->power_wells[i].id; + + WARN_ON(id >= sizeof(power_well_ids) * 8); + WARN_ON(power_well_ids & BIT_ULL(id)); + power_well_ids |= BIT_ULL(id); + } + return 0; }
Check that all the power well IDs are unique on the given platform. v2: - Fix using BIT_ULL() instead of BIT() for 64 bit mask. Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +++++++++++ 1 file changed, 11 insertions(+)