| Message ID | 1503440115-6753-1-git-send-email-oscar.mateo@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 2017-08-22 at 15:15 -0700, Oscar Mateo wrote: > Disable deref enhancement logic. Could we add a bit more of info here? like that fixes some CS hangs on 3D Push Constant dispatches? with a bit more info feel free to add Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> I checked the spec and chicken reg. Also this Wa was on my todo list here to try it out. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ > 2 files changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index d4ecb19..d9b0249 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -8055,6 +8055,7 @@ enum { > #define GEN7_ROW_CHICKEN2 _MMIO(0xe4f4) > #define GEN7_ROW_CHICKEN2_GT2 _MMIO(0xf4f4) > #define DOP_CLOCK_GATING_DISABLE (1<<0) > +#define PUSH_CONSTANT_DEREF_DISABLE (1<<8) > > #define HSW_ROW_CHICKEN3 _MMIO(0xe49c) > #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6) > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c > index d23f188..d7e1ccf 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -1083,6 +1083,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine) > WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA, > GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); > > + /* WaPushConstantDereferenceHoldDisable:cnl */ > + WA_SET_BIT(GEN7_ROW_CHICKEN2, PUSH_CONSTANT_DEREF_DISABLE); > + > /* WaEnablePreemptionGranularityControlByUMD:cnl */ > ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1); > if (ret)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d4ecb19..d9b0249 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8055,6 +8055,7 @@ enum { #define GEN7_ROW_CHICKEN2 _MMIO(0xe4f4) #define GEN7_ROW_CHICKEN2_GT2 _MMIO(0xf4f4) #define DOP_CLOCK_GATING_DISABLE (1<<0) +#define PUSH_CONSTANT_DEREF_DISABLE (1<<8) #define HSW_ROW_CHICKEN3 _MMIO(0xe49c) #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index d23f188..d7e1ccf 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -1083,6 +1083,9 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine) WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA, GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); + /* WaPushConstantDereferenceHoldDisable:cnl */ + WA_SET_BIT(GEN7_ROW_CHICKEN2, PUSH_CONSTANT_DEREF_DISABLE); + /* WaEnablePreemptionGranularityControlByUMD:cnl */ ret= wa_ring_whitelist_reg(engine, GEN8_CS_CHICKEN1); if (ret)
Disable deref enhancement logic. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ 2 files changed, 4 insertions(+)