| Message ID | 1505132937-27327-2-git-send-email-juhapekka.heikkila@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Juha-Pekka,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.13 next-20170914]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Juha-Pekka-Heikkila/drm-i915-Skylake-plane-update-disable-unifications-v3/20170914-112949
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: i386-randconfig-x013-201737 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
Note: the linux-review/Juha-Pekka-Heikkila/drm-i915-Skylake-plane-update-disable-unifications-v3/20170914-112949 HEAD 64d427ba0647f6bc6a228cf54d16f757633c98e6 builds fine.
It only hurts bisectibility.
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_display.c: In function 'skylake_update_primary_plane':
>> drivers/gpu/drm/i915/intel_display.c:3588:6: error: 'struct intel_crtc' has no member named 'dspaddr_offset'; did you mean 'scanline_offset'?
crtc->dspaddr_offset = surf_addr;
^~
vim +3588 drivers/gpu/drm/i915/intel_display.c
46f788ba2 Ville Syrjälä 2017-03-17 3556
282dbf9b0 Ville Syrjälä 2017-03-27 3557 static void skylake_update_primary_plane(struct intel_plane *plane,
a8d201af6 Maarten Lankhorst 2016-01-07 3558 const struct intel_crtc_state *crtc_state,
a8d201af6 Maarten Lankhorst 2016-01-07 3559 const struct intel_plane_state *plane_state)
6156a4560 Chandra Konduru 2015-04-27 3560 {
282dbf9b0 Ville Syrjälä 2017-03-27 3561 struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
282dbf9b0 Ville Syrjälä 2017-03-27 3562 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
282dbf9b0 Ville Syrjälä 2017-03-27 3563 const struct drm_framebuffer *fb = plane_state->base.fb;
282dbf9b0 Ville Syrjälä 2017-03-27 3564 enum plane_id plane_id = plane->id;
282dbf9b0 Ville Syrjälä 2017-03-27 3565 enum pipe pipe = plane->pipe;
a0864d590 Ville Syrjälä 2017-03-23 3566 u32 plane_ctl = plane_state->ctl;
a8d201af6 Maarten Lankhorst 2016-01-07 3567 unsigned int rotation = plane_state->base.rotation;
d21967740 Ville Syrjälä 2016-01-28 3568 u32 stride = skl_plane_stride(fb, 0, rotation);
2e2adb057 Ville Syrjälä 2017-08-01 3569 u32 aux_stride = skl_plane_stride(fb, 1, rotation);
b63a16f6c Ville Syrjälä 2016-01-28 3570 u32 surf_addr = plane_state->main.offset;
a8d201af6 Maarten Lankhorst 2016-01-07 3571 int scaler_id = plane_state->scaler_id;
b63a16f6c Ville Syrjälä 2016-01-28 3572 int src_x = plane_state->main.x;
b63a16f6c Ville Syrjälä 2016-01-28 3573 int src_y = plane_state->main.y;
936e71e31 Ville Syrjälä 2016-07-26 3574 int src_w = drm_rect_width(&plane_state->base.src) >> 16;
936e71e31 Ville Syrjälä 2016-07-26 3575 int src_h = drm_rect_height(&plane_state->base.src) >> 16;
936e71e31 Ville Syrjälä 2016-07-26 3576 int dst_x = plane_state->base.dst.x1;
936e71e31 Ville Syrjälä 2016-07-26 3577 int dst_y = plane_state->base.dst.y1;
936e71e31 Ville Syrjälä 2016-07-26 3578 int dst_w = drm_rect_width(&plane_state->base.dst);
936e71e31 Ville Syrjälä 2016-07-26 3579 int dst_h = drm_rect_height(&plane_state->base.dst);
dd584fc07 Ville Syrjälä 2017-03-09 3580 unsigned long irqflags;
70d21f0e9 Damien Lespiau 2013-07-03 3581
6687c9062 Ville Syrjälä 2015-09-15 3582 /* Sizes are 0 based */
6687c9062 Ville Syrjälä 2015-09-15 3583 src_w--;
6687c9062 Ville Syrjälä 2015-09-15 3584 src_h--;
6687c9062 Ville Syrjälä 2015-09-15 3585 dst_w--;
6687c9062 Ville Syrjälä 2015-09-15 3586 dst_h--;
6687c9062 Ville Syrjälä 2015-09-15 3587
282dbf9b0 Ville Syrjälä 2017-03-27 @3588 crtc->dspaddr_offset = surf_addr;
4c0b8a8bc Paulo Zanoni 2016-08-19 3589
282dbf9b0 Ville Syrjälä 2017-03-27 3590 crtc->adjusted_x = src_x;
282dbf9b0 Ville Syrjälä 2017-03-27 3591 crtc->adjusted_y = src_y;
2db3366b1 Paulo Zanoni 2015-09-14 3592
dd584fc07 Ville Syrjälä 2017-03-09 3593 spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
dd584fc07 Ville Syrjälä 2017-03-09 3594
6602be0e2 Rodrigo Vivi 2017-07-06 3595 if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
dd584fc07 Ville Syrjälä 2017-03-09 3596 I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
78587de29 Ville Syrjälä 2017-03-09 3597 PLANE_COLOR_PIPE_GAMMA_ENABLE |
78587de29 Ville Syrjälä 2017-03-09 3598 PLANE_COLOR_PIPE_CSC_ENABLE |
78587de29 Ville Syrjälä 2017-03-09 3599 PLANE_COLOR_PLANE_GAMMA_DISABLE);
78587de29 Ville Syrjälä 2017-03-09 3600 }
78587de29 Ville Syrjälä 2017-03-09 3601
dd584fc07 Ville Syrjälä 2017-03-09 3602 I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl);
dd584fc07 Ville Syrjälä 2017-03-09 3603 I915_WRITE_FW(PLANE_OFFSET(pipe, plane_id), (src_y << 16) | src_x);
dd584fc07 Ville Syrjälä 2017-03-09 3604 I915_WRITE_FW(PLANE_STRIDE(pipe, plane_id), stride);
dd584fc07 Ville Syrjälä 2017-03-09 3605 I915_WRITE_FW(PLANE_SIZE(pipe, plane_id), (src_h << 16) | src_w);
2e2adb057 Ville Syrjälä 2017-08-01 3606 I915_WRITE_FW(PLANE_AUX_DIST(pipe, plane_id),
2e2adb057 Ville Syrjälä 2017-08-01 3607 (plane_state->aux.offset - surf_addr) | aux_stride);
2e2adb057 Ville Syrjälä 2017-08-01 3608 I915_WRITE_FW(PLANE_AUX_OFFSET(pipe, plane_id),
2e2adb057 Ville Syrjälä 2017-08-01 3609 (plane_state->aux.y << 16) | plane_state->aux.x);
6156a4560 Chandra Konduru 2015-04-27 3610
6156a4560 Chandra Konduru 2015-04-27 3611 if (scaler_id >= 0) {
6156a4560 Chandra Konduru 2015-04-27 3612 uint32_t ps_ctrl = 0;
6156a4560 Chandra Konduru 2015-04-27 3613
6156a4560 Chandra Konduru 2015-04-27 3614 WARN_ON(!dst_w || !dst_h);
8e816bb49 Ville Syrjälä 2016-11-22 3615 ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane_id) |
6156a4560 Chandra Konduru 2015-04-27 3616 crtc_state->scaler_state.scalers[scaler_id].mode;
dd584fc07 Ville Syrjälä 2017-03-09 3617 I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl);
dd584fc07 Ville Syrjälä 2017-03-09 3618 I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
dd584fc07 Ville Syrjälä 2017-03-09 3619 I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (dst_x << 16) | dst_y);
dd584fc07 Ville Syrjälä 2017-03-09 3620 I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (dst_w << 16) | dst_h);
dd584fc07 Ville Syrjälä 2017-03-09 3621 I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);
6156a4560 Chandra Konduru 2015-04-27 3622 } else {
dd584fc07 Ville Syrjälä 2017-03-09 3623 I915_WRITE_FW(PLANE_POS(pipe, plane_id), (dst_y << 16) | dst_x);
6156a4560 Chandra Konduru 2015-04-27 3624 }
6156a4560 Chandra Konduru 2015-04-27 3625
dd584fc07 Ville Syrjälä 2017-03-09 3626 I915_WRITE_FW(PLANE_SURF(pipe, plane_id),
be1e34151 Chris Wilson 2017-01-16 3627 intel_plane_ggtt_offset(plane_state) + surf_addr);
70d21f0e9 Damien Lespiau 2013-07-03 3628
dd584fc07 Ville Syrjälä 2017-03-09 3629 POSTING_READ_FW(PLANE_SURF(pipe, plane_id));
dd584fc07 Ville Syrjälä 2017-03-09 3630
dd584fc07 Ville Syrjälä 2017-03-09 3631 spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
70d21f0e9 Damien Lespiau 2013-07-03 3632 }
70d21f0e9 Damien Lespiau 2013-07-03 3633
:::::: The code at line 3588 was first introduced by commit
:::::: 282dbf9b017bc6d5fdaeadf14e534c2fe22fee2d drm/i915: Pass intel_plane and intel_crtc to plane hooks
:::::: TO: Ville Syrjälä <ville.syrjala@linux.intel.com>
:::::: CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7cd392f..f922e2f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3287,13 +3287,14 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, int x = plane_state->main.x; int y = plane_state->main.y; unsigned long irqflags; + u32 dspaddr_offset; linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0); if (INTEL_GEN(dev_priv) >= 4) - crtc->dspaddr_offset = plane_state->main.offset; + dspaddr_offset = plane_state->main.offset; else - crtc->dspaddr_offset = linear_offset; + dspaddr_offset = linear_offset; crtc->adjusted_x = x; crtc->adjusted_y = y; @@ -3322,18 +3323,18 @@ static void i9xx_update_primary_plane(struct intel_plane *primary, if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x); } else if (INTEL_GEN(dev_priv) >= 4) { I915_WRITE_FW(DSPSURF(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x); I915_WRITE_FW(DSPLINOFF(plane), linear_offset); } else { I915_WRITE_FW(DSPADDR(plane), intel_plane_ggtt_offset(plane_state) + - crtc->dspaddr_offset); + dspaddr_offset); } POSTING_READ_FW(reg); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 17649f1..0d0abed1 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -805,7 +805,6 @@ struct intel_crtc { /* Display surface base address adjustement for pageflips. Note that on * gen4+ this only adjusts up to a tile, offsets within a tile are * handled in the hw itself (with the TILEOFF register). */ - u32 dspaddr_offset; int adjusted_x; int adjusted_y;
Move u32 dspaddr_offset from struct intel_crtc member into local variable in i9xx_update_primary_plane() Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 11 ++++++----- drivers/gpu/drm/i915/intel_drv.h | 1 - 2 files changed, 6 insertions(+), 6 deletions(-)