From patchwork Tue Sep 19 17:42:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9959869 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4425A601E9 for ; Tue, 19 Sep 2017 17:40:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F9B028985 for ; Tue, 19 Sep 2017 17:40:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1F26E28E0C; Tue, 19 Sep 2017 17:40:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AEF2F28EF0 for ; Tue, 19 Sep 2017 17:40:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 550ED6E64D; Tue, 19 Sep 2017 17:39:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9ED9F6E63F for ; Tue, 19 Sep 2017 17:39:36 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Sep 2017 10:39:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,418,1500966000"; d="scan'208"; a="1016261064" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 19 Sep 2017 10:39:28 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Tue, 19 Sep 2017 23:12:03 +0530 Message-Id: <1505842927-13327-28-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505842927-13327-1-git-send-email-sagar.a.kamble@intel.com> References: <1505842927-13327-1-git-send-email-sagar.a.kamble@intel.com> Cc: Tom O'Rourke Subject: [Intel-gfx] [PATCH 27/31] drm/i915/slpc: Add SLPC banner to RPS debugfs interfaces. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP When SLPC is controlling frequency requests, RPS state related to autotuning is no longer valid. Make user aware through banner upfront. Value read from register RPNSWREQ likely has the frequency requested last by GuC SLPC. v1: Replace HAS_SLPC with intel_slpc_active (Paulo) Avoid magic numbers (Nick) Use a function for repeated code (Jon) v2: Add "SLPC Active" to i915_frequency_info output and don't update cur_freq as it is driver internal request. (Chris) v3: Removing sysfs interface gt_req_freq_mhz out of this patch for proper division of functionality. (Sagar) v4: idle_freq, boost_freq are also not used with SLPC. v5: Added SLPC banner to i915_rps_boost_info and keep printing driver internal values. (Chris) v6: Commit message update. Signed-off-by: Tom O'Rourke Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 7a0838f..a873565 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1195,6 +1195,9 @@ static int i915_frequency_info(struct seq_file *m, void *unused) intel_runtime_pm_get(dev_priv); + if (intel_slpc_active(&dev_priv->guc.slpc)) + seq_puts(m, "SLPC Active\n"); + if (IS_GEN5(dev_priv)) { u16 rgvswctl = I915_READ16(MEMSWCTL); u16 rgvstat = I915_READ16(MEMSTAT_ILK); @@ -2409,6 +2412,9 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) struct intel_rps *rps = &dev_priv->pm.rps; struct drm_file *file; + if (intel_slpc_active(&dev_priv->guc.slpc)) + seq_puts(m, "SLPC Active\n"); + seq_printf(m, "RPS enabled? %d\n", rps->enabled); seq_printf(m, "GPU busy? %s [%d requests]\n", yesno(dev_priv->gt.awake), dev_priv->gt.active_requests);