From patchwork Wed Sep 20 17:38:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9961965 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4AAEC60234 for ; Wed, 20 Sep 2017 17:35:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 359AF2907C for ; Wed, 20 Sep 2017 17:35:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2AACC291E0; Wed, 20 Sep 2017 17:35:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DB28C2907C for ; Wed, 20 Sep 2017 17:35:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E7656E799; Wed, 20 Sep 2017 17:35:09 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id C8FCC6E77F for ; Wed, 20 Sep 2017 17:35:03 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Sep 2017 10:35:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,422,1500966000"; d="scan'208";a="137585761" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga002.jf.intel.com with ESMTP; 20 Sep 2017 10:35:02 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Sep 2017 23:08:18 +0530 Message-Id: <1505929104-28823-4-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505929104-28823-1-git-send-email-sagar.a.kamble@intel.com> References: <1505929104-28823-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 3/9] drm/i915/guc: Update GuC ggtt.invalidate/interrupts/communication across RPM suspend/resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Apart from configuring interrupts, we need to update the ggtt invalidate interface and GuC communication on suspend. This functionality can be reused for other suspend and reset paths. Prepared GuC specific helpers to handle these suspend/resume tasks namely - intel_guc_runtime_suspend, intel_guc_runtime_resume. v2: Rebase w.r.t removal of GuC code restructuring. Cc: Michal Wajdeczko Cc: Michał Winiarski Signed-off-by: Sagar Arun Kamble --- drivers/gpu/drm/i915/intel_uc.c | 66 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 59 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 0dbb4b9..fa698db 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -551,8 +551,6 @@ static int intel_guc_enter_sleep(struct intel_guc *guc) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - gen9_disable_guc_interrupts(dev_priv); - ctx = dev_priv->kernel_context; data[0] = INTEL_GUC_ACTION_ENTER_S_STATE; @@ -577,9 +575,6 @@ static int intel_guc_exit_sleep(struct intel_guc *guc) if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS) return 0; - if (i915.guc_log_level >= 0) - gen9_enable_guc_interrupts(dev_priv); - ctx = dev_priv->kernel_context; data[0] = INTEL_GUC_ACTION_EXIT_S_STATE; @@ -590,14 +585,71 @@ static int intel_guc_exit_sleep(struct intel_guc *guc) return intel_guc_send(guc, data, ARRAY_SIZE(data)); } +int intel_guc_runtime_suspend(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + int ret; + + ret = intel_guc_enter_sleep(guc); + if (ret) { + DRM_ERROR("GuC enter sleep failed (%d)\n", ret); + return ret; + } + + i915_ggtt_disable_guc(dev_priv); + gen9_disable_guc_interrupts(dev_priv); + + return 0; +} + +int intel_guc_runtime_resume(struct intel_guc *guc) +{ + struct drm_i915_private *dev_priv = guc_to_i915(guc); + int ret; + + if (i915.guc_log_level >= 0) + gen9_enable_guc_interrupts(dev_priv); + i915_ggtt_enable_guc(dev_priv); + + ret = intel_guc_exit_sleep(guc); + if (ret) { + DRM_ERROR("GuC exit sleep failed (%d)\n", ret); + return ret; + } + + return 0; +} + int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv) { - return intel_guc_enter_sleep(&dev_priv->guc); + int ret; + + if (!i915.enable_guc_loading) + return 0; + + ret = intel_guc_runtime_suspend(&dev_priv->guc); + if (ret) + return ret; + + guc_disable_communication(&dev_priv->guc); + + return 0; } int intel_uc_runtime_resume(struct drm_i915_private *dev_priv) { - return intel_guc_exit_sleep(&dev_priv->guc); + int ret; + + if (!i915.enable_guc_loading) + return 0; + + ret = guc_enable_communication(&dev_priv->guc); + if (ret) { + DRM_ERROR("GuC enable communication failed (%d)\n", ret); + return ret; + } + + return intel_guc_runtime_resume(&dev_priv->guc); } int intel_uc_suspend(struct drm_i915_private *dev_priv)