From patchwork Tue Sep 26 13:36:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: sagar.a.kamble@intel.com X-Patchwork-Id: 9972025 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DD3756037E for ; Tue, 26 Sep 2017 13:33:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D6B6728992 for ; Tue, 26 Sep 2017 13:33:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D526D28DBD; Tue, 26 Sep 2017 13:33:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6E22528EC2 for ; Tue, 26 Sep 2017 13:33:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E3E7F6E561; Tue, 26 Sep 2017 13:33:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4020F6E215 for ; Tue, 26 Sep 2017 13:33:37 +0000 (UTC) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Sep 2017 06:33:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.42,440,1500966000"; d="scan'208"; a="1018567696" Received: from sakamble-desktop.iind.intel.com ([10.223.26.118]) by orsmga003.jf.intel.com with ESMTP; 26 Sep 2017 06:33:34 -0700 From: Sagar Arun Kamble To: intel-gfx@lists.freedesktop.org Date: Tue, 26 Sep 2017 19:06:50 +0530 Message-Id: <1506433017-16402-2-git-send-email-sagar.a.kamble@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1506433017-16402-1-git-send-email-sagar.a.kamble@intel.com> References: <1506433017-16402-1-git-send-email-sagar.a.kamble@intel.com> MIME-Version: 1.0 Cc: Paulo Zanoni , Rodrigo Vivi Subject: [Intel-gfx] [PATCH v9 1/8] drm/i915: Create GEM runtime resume helper and handle GEM suspend/resume errors X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Prepared helper i915_gem_runtime_resume to recreate gem setup. Returning status from i915_gem_runtime_suspend and i915_gem_resume. This will be placeholder for handling any errors from uC suspend/resume in upcoming patches. Restructured the suspend/resume routines w.r.t setup creation and rollback order. This also fixes issue of ordering of i915_gem_runtime_resume with intel_runtime_pm_enable_interrupts. v2: Fixed return from intel_runtime_resume. (Michał Winiarski) Signed-off-by: Sagar Arun Kamble Cc: Chris Wilson Cc: Imre Deak Cc: Paulo Zanoni Cc: Rodrigo Vivi Cc: Michal Wajdeczko Cc: Michał Winiarski --- drivers/gpu/drm/i915/i915_drv.c | 34 ++++++++++++++++++++-------------- drivers/gpu/drm/i915/i915_drv.h | 5 +++-- drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++++++++++-- 3 files changed, 41 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 7056bb2..a3bbf18 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1655,6 +1655,7 @@ static int i915_suspend_switcheroo(struct drm_device *dev, pm_message_t state) static int i915_drm_resume(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); + struct pci_dev *pdev = dev_priv->drm.pdev; int ret; disable_rpm_wakeref_asserts(dev_priv); @@ -1666,7 +1667,9 @@ static int i915_drm_resume(struct drm_device *dev) intel_csr_ucode_resume(dev_priv); - i915_gem_resume(dev_priv); + ret = i915_gem_resume(dev_priv); + if (ret) + dev_err(&pdev->dev, "GEM resume failed\n"); i915_restore_state(dev_priv); intel_pps_unlock_regs_wa(dev_priv); @@ -2495,7 +2498,11 @@ static int intel_runtime_suspend(struct device *kdev) * We are safe here against re-faults, since the fault handler takes * an RPM reference. */ - i915_gem_runtime_suspend(dev_priv); + ret = i915_gem_runtime_suspend(dev_priv); + if (ret) { + enable_rpm_wakeref_asserts(dev_priv); + return ret; + } intel_guc_suspend(dev_priv); @@ -2515,6 +2522,8 @@ static int intel_runtime_suspend(struct device *kdev) DRM_ERROR("Runtime suspend failed, disabling it (%d)\n", ret); intel_runtime_pm_enable_interrupts(dev_priv); + intel_guc_resume(dev_priv); + i915_gem_runtime_resume(dev_priv); enable_rpm_wakeref_asserts(dev_priv); return ret; @@ -2567,7 +2576,7 @@ static int intel_runtime_resume(struct device *kdev) struct pci_dev *pdev = to_pci_dev(kdev); struct drm_device *dev = pci_get_drvdata(pdev); struct drm_i915_private *dev_priv = to_i915(dev); - int ret = 0; + int err = 0, ret; if (WARN_ON_ONCE(!HAS_RUNTIME_PM(dev_priv))) return -ENODEV; @@ -2593,16 +2602,9 @@ static int intel_runtime_resume(struct device *kdev) } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { hsw_disable_pc8(dev_priv); } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { - ret = vlv_resume_prepare(dev_priv, true); + err = vlv_resume_prepare(dev_priv, true); } - /* - * No point of rolling back things in case of an error, as the best - * we can do is to hope that things will still work (and disable RPM). - */ - i915_gem_init_swizzling(dev_priv); - i915_gem_restore_fences(dev_priv); - intel_runtime_pm_enable_interrupts(dev_priv); /* @@ -2615,14 +2617,18 @@ static int intel_runtime_resume(struct device *kdev) intel_enable_ipc(dev_priv); + ret = i915_gem_runtime_resume(dev_priv); + if (!err) + err = ret; + enable_rpm_wakeref_asserts(dev_priv); - if (ret) - DRM_ERROR("Runtime resume failed, disabling it (%d)\n", ret); + if (err) + DRM_ERROR("Runtime resume failed, disabling it (%d)\n", err); else DRM_DEBUG_KMS("Device resumed\n"); - return ret; + return err; } const struct dev_pm_ops i915_pm_ops = { diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 61a4be9..69370c1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3471,7 +3471,8 @@ struct i915_vma * __must_check int i915_gem_object_unbind(struct drm_i915_gem_object *obj); void i915_gem_release_mmap(struct drm_i915_gem_object *obj); -void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv); +int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv); +int i915_gem_runtime_resume(struct drm_i915_private *dev_priv); static inline int __sg_page_count(const struct scatterlist *sg) { @@ -3674,7 +3675,7 @@ void i915_gem_reset_engine(struct intel_engine_cs *engine, int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv, unsigned int flags); int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv); -void i915_gem_resume(struct drm_i915_private *dev_priv); +int i915_gem_resume(struct drm_i915_private *dev_priv); int i915_gem_fault(struct vm_fault *vmf); int i915_gem_object_wait(struct drm_i915_gem_object *obj, unsigned int flags, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 73eeb6b..dbe181b 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2022,7 +2022,7 @@ int i915_gem_fault(struct vm_fault *vmf) intel_runtime_pm_put(i915); } -void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) +int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) { struct drm_i915_gem_object *obj, *on; int i; @@ -2065,6 +2065,20 @@ void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) GEM_BUG_ON(!list_empty(®->vma->obj->userfault_link)); reg->dirty = true; } + + return 0; +} + +int i915_gem_runtime_resume(struct drm_i915_private *dev_priv) +{ + /* + * No point of rolling back things in case of an error, as the best + * we can do is to hope that things will still work (and disable RPM). + */ + i915_gem_init_swizzling(dev_priv); + i915_gem_restore_fences(dev_priv); + + return 0; } static int i915_gem_object_create_mmap_offset(struct drm_i915_gem_object *obj) @@ -4587,7 +4601,7 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) return ret; } -void i915_gem_resume(struct drm_i915_private *dev_priv) +int i915_gem_resume(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; @@ -4603,6 +4617,8 @@ void i915_gem_resume(struct drm_i915_private *dev_priv) dev_priv->gt.resume(dev_priv); mutex_unlock(&dev->struct_mutex); + + return 0; } void i915_gem_init_swizzling(struct drm_i915_private *dev_priv)