| Message ID | 1507582707-20079-2-git-send-email-oscar.mateo@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10/9/2017 1:58 PM, Oscar Mateo wrote: > Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware, > there is no need to save space for them in the list of context workarounds. > > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Is it worth mention the commit that changed this? E.g.: Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware [commit 32ced39c1b12 ("drm/i915: Transform whitelisting WAs into a simple reg write")]... Anyway, Reviewed-by: Michel Thierry <michel.thierry@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 799a90a..47a357c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1954,13 +1954,7 @@ struct i915_wa_reg { > u32 mask; > }; > > -/* > - * RING_MAX_NONPRIV_SLOTS is per-engine but at this point we are only > - * allowing it for RCS as we don't foresee any requirement of having > - * a whitelist for other engines. When it is really required for > - * other engines then the limit need to be increased. > - */ > -#define I915_MAX_WA_REGS (16 + RING_MAX_NONPRIV_SLOTS) > +#define I915_MAX_WA_REGS 16 > > struct i915_workarounds { > struct i915_wa_reg reg[I915_MAX_WA_REGS]; > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >
Oscar Mateo <oscar.mateo@intel.com> writes: > Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware, > there is no need to save space for them in the list of context workarounds. > > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 8 +------- > 1 file changed, 1 insertion(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 799a90a..47a357c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1954,13 +1954,7 @@ struct i915_wa_reg { > u32 mask; > }; > > -/* > - * RING_MAX_NONPRIV_SLOTS is per-engine but at this point we are only > - * allowing it for RCS as we don't foresee any requirement of having > - * a whitelist for other engines. When it is really required for > - * other engines then the limit need to be increased. > - */ > -#define I915_MAX_WA_REGS (16 + RING_MAX_NONPRIV_SLOTS) > +#define I915_MAX_WA_REGS 16 > > struct i915_workarounds { > struct i915_wa_reg reg[I915_MAX_WA_REGS]; > -- > 1.9.1
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 799a90a..47a357c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1954,13 +1954,7 @@ struct i915_wa_reg { u32 mask; }; -/* - * RING_MAX_NONPRIV_SLOTS is per-engine but at this point we are only - * allowing it for RCS as we don't foresee any requirement of having - * a whitelist for other engines. When it is really required for - * other engines then the limit need to be increased. - */ -#define I915_MAX_WA_REGS (16 + RING_MAX_NONPRIV_SLOTS) +#define I915_MAX_WA_REGS 16 struct i915_workarounds { struct i915_wa_reg reg[I915_MAX_WA_REGS];
Now that we write RING_FORCE_TO_NONPRIV registers directly to hardware, there is no need to save space for them in the list of context workarounds. Signed-off-by: Oscar Mateo <oscar.mateo@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-)