From patchwork Fri Oct 27 18:01:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10030405 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 127236022E for ; Fri, 27 Oct 2017 18:01:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0FF8128FAA for ; Fri, 27 Oct 2017 18:01:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 04DB928FB9; Fri, 27 Oct 2017 18:01:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AA7DD28FAA for ; Fri, 27 Oct 2017 18:01:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F34B6E9B7; Fri, 27 Oct 2017 18:01:20 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id C36986E9B2 for ; Fri, 27 Oct 2017 18:01:16 +0000 (UTC) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Oct 2017 11:01:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.44,304,1505804400"; d="scan'208"; a="1236250387" Received: from omateolo-linux.fm.intel.com ([10.1.27.13]) by fmsmga002.fm.intel.com with ESMTP; 27 Oct 2017 11:01:14 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Fri, 27 Oct 2017 11:01:07 -0700 Message-Id: <1509127275-22121-5-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509127275-22121-1-git-send-email-oscar.mateo@intel.com> References: <1509127275-22121-1-git-send-email-oscar.mateo@intel.com> Cc: Chris Wilson Subject: [Intel-gfx] [RFC PATCH 04/12] drm/i915: Capture some extra small details in the GPU error state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Namely: - Capture tiling per drm_i915_error_object - Capture the LRC descriptor per active request - Capture the wa_batchbuffer unconditionally - Capture the GAM_ECOCHK register for all GENs They don't increase the size greatly, and they can be useful even in the existing GPU error dump (but I will need them for sure in AubCrash). Signed-off-by: Oscar Mateo Cc: Chris Wilson --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_gpu_error.c | 25 +++++++++++++++---------- 2 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 366ba74..f64871b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -992,6 +992,7 @@ struct i915_gpu_state { struct drm_i915_error_object { u64 gtt_offset; u64 gtt_size; + u32 tiling:2; int page_count; int unused; u32 *pages[0]; @@ -1006,6 +1007,7 @@ struct i915_gpu_state { long jiffies; pid_t pid; u32 context; + u64 lrc_desc; int priority; int ban_score; u32 seqno; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 653fb69..befd17c 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -897,6 +897,7 @@ void __i915_gpu_state_free(struct kref *error_ref) dst->gtt_offset = vma->node.start; dst->gtt_size = vma->node.size; + dst->tiling = i915_gem_object_get_tiling(vma->obj); dst->page_count = 0; dst->unused = 0; @@ -1270,16 +1271,21 @@ static void error_record_engine_registers(struct i915_gpu_state *error, static void record_request(struct drm_i915_gem_request *request, struct drm_i915_error_request *erq) { - erq->context = request->ctx->hw_id; + struct i915_gem_context *ctx = request->ctx; + struct intel_engine_cs *engine = request->engine; + struct intel_context *ce = &ctx->engine[engine->id]; + + erq->context = ctx->hw_id; + erq->lrc_desc = ce->lrc_desc; erq->priority = request->priotree.priority; - erq->ban_score = atomic_read(&request->ctx->ban_score); + erq->ban_score = atomic_read(&ctx->ban_score); erq->seqno = request->global_seqno; erq->jiffies = request->emitted_jiffies; erq->head = request->head; erq->tail = request->tail; rcu_read_lock(); - erq->pid = request->ctx->pid ? pid_nr(request->ctx->pid) : 0; + erq->pid = ctx->pid ? pid_nr(ctx->pid) : 0; rcu_read_unlock(); } @@ -1442,10 +1448,10 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv, i915_error_object_create(dev_priv, request->batch); - if (HAS_BROKEN_CS_TLB(dev_priv)) - ee->wa_batchbuffer = - i915_error_object_create(dev_priv, - engine->scratch); + ee->wa_batchbuffer = + i915_error_object_create(dev_priv, + engine->scratch); + request_record_user_bo(request, ee); ee->ctx = @@ -1619,10 +1625,8 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, error->ccid = I915_READ(CCID); /* 3: Feature specific registers */ - if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv)) { - error->gam_ecochk = I915_READ(GAM_ECOCHK); + if (IS_GEN6(dev_priv) || IS_GEN7(dev_priv)) error->gac_eco = I915_READ(GAC_ECO_BITS); - } /* 4: Everything else */ if (INTEL_GEN(dev_priv) >= 8) { @@ -1641,6 +1645,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv, } error->eir = I915_READ(EIR); error->pgtbl_er = I915_READ(PGTBL_ER); + error->gam_ecochk = I915_READ(GAM_ECOCHK); } static void i915_error_capture_msg(struct drm_i915_private *dev_priv,