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[RFC,13/20] drm/i915/cfl: Move GT and Display workarounds from init_clock_gating

Message ID 1509732588-10599-14-git-send-email-oscar.mateo@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

oscar.mateo@intel.com Nov. 3, 2017, 6:09 p.m. UTC 
To their rightful place inside intel_workarounds.c

v2: Static tables

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v1)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c          | 23 +----------------------
 drivers/gpu/drm/i915/intel_workarounds.c |  8 ++++++++
 2 files changed, 9 insertions(+), 22 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f712b02..a85a001 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8466,25 +8466,6 @@  static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
 }
 
-static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
-{
-	if (!HAS_PCH_CNP(dev_priv))
-		return;
-
-	/* Wa #1181 */
-	I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) |
-		   CNP_PWM_CGE_GATING_DISABLE);
-}
-
-static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
-{
-	cnp_init_clock_gating(dev_priv);
-
-	/* WaFbcNukeOnHostModify:cfl */
-	I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
-		   ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
-}
-
 static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
 {
 	/* WaDisableSDEUnitClockGating:kbl */
@@ -8961,10 +8942,8 @@  static void nop_init_clock_gating(struct drm_i915_private *dev_priv)
  */
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
-	if (IS_CANNONLAKE(dev_priv))
+	if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
 		dev_priv->display.init_clock_gating = nop_init_clock_gating;
-	else if (IS_COFFEELAKE(dev_priv))
-		dev_priv->display.init_clock_gating = cfl_init_clock_gating;
 	else if (IS_SKYLAKE(dev_priv))
 		dev_priv->display.init_clock_gating = skl_init_clock_gating;
 	else if (IS_KABYLAKE(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index d5cbda1..4fe1dd0 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -938,6 +938,14 @@  static bool has_pch_cnp(struct drm_i915_private *dev_priv,
 }
 
 static struct i915_wa_reg cfl_disp_was[] = {
+	{ WA_DISP("Wa #1181"),
+	  ALL_REVS, REG(SOUTH_DSPCLK_GATE_D),
+	  SET_BIT(CNP_PWM_CGE_GATING_DISABLE),
+	  .pre_hook = has_pch_cnp },
+
+	{ WA_DISP("WaFbcNukeOnHostModify"),
+	  ALL_REVS, REG(ILK_DPFC_CHICKEN),
+	  SET_BIT(ILK_DPFC_NUKE_ON_ANY_MODIFICATION) },
 };
 
 static struct i915_wa_reg cnl_disp_was[] = {