From patchwork Fri Nov 3 18:09:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10040989 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DBB47602D8 for ; Fri, 3 Nov 2017 18:09:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D335228F7D for ; Fri, 3 Nov 2017 18:09:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C7AFC28FD0; Fri, 3 Nov 2017 18:09:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 775C528F7D for ; Fri, 3 Nov 2017 18:09:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C83D46EAF7; Fri, 3 Nov 2017 18:09:43 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 367456EAEE for ; Fri, 3 Nov 2017 18:09:42 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP; 03 Nov 2017 11:09:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,339,1505804400"; d="scan'208";a="169033958" Received: from omateolo-linux.fm.intel.com ([10.1.27.13]) by orsmga005.jf.intel.com with ESMTP; 03 Nov 2017 11:09:37 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Fri, 3 Nov 2017 11:09:43 -0700 Message-Id: <1509732588-10599-16-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1509732588-10599-1-git-send-email-oscar.mateo@intel.com> References: <1509732588-10599-1-git-send-email-oscar.mateo@intel.com> MIME-Version: 1.0 Cc: Rodrigo Vivi Subject: [Intel-gfx] [RFC PATCH 15/20] drm/i915/kbl: Move GT and Display workarounds from init_clock_gating X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP To their rightful place inside intel_workarounds.c v2: Classify WaDisableSDEUnitClockGating and WaDisableGamClockGating as GT WAs v3: Static tables (Joonas) Signed-off-by: Oscar Mateo Reviewed-by: Chris Wilson (v1) Cc: Rodrigo Vivi Cc: Mika Kuoppala Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 21 +-------------------- drivers/gpu/drm/i915/intel_workarounds.c | 11 +++++++++++ 2 files changed, 12 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b5e7432..046553b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8438,23 +8438,6 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv, I915_WRITE(GEN7_MISCCPCTL, misccpctl); } -static void kbl_init_clock_gating(struct drm_i915_private *dev_priv) -{ - /* WaDisableSDEUnitClockGating:kbl */ - if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0)) - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | - GEN8_SDEUNIT_CLOCK_GATE_DISABLE); - - /* WaDisableGamClockGating:kbl */ - if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0)) - I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) | - GEN6_GAMUNIT_CLOCK_GATE_DISABLE); - - /* WaFbcNukeOnHostModify:kbl */ - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | - ILK_DPFC_NUKE_ON_ANY_MODIFICATION); -} - static void skl_init_clock_gating(struct drm_i915_private *dev_priv) { /* WAC6entrylatency:skl */ @@ -8915,12 +8898,10 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv) void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) { if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || - IS_GEMINILAKE(dev_priv)) + IS_GEMINILAKE(dev_priv) || IS_KABYLAKE(dev_priv)) dev_priv->display.init_clock_gating = nop_init_clock_gating; else if (IS_SKYLAKE(dev_priv)) dev_priv->display.init_clock_gating = skl_init_clock_gating; - else if (IS_KABYLAKE(dev_priv)) - dev_priv->display.init_clock_gating = kbl_init_clock_gating; else if (IS_BROXTON(dev_priv)) dev_priv->display.init_clock_gating = bxt_init_clock_gating; else if (IS_BROADWELL(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index a438ce3..396399b 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -745,6 +745,14 @@ static uint mmio_workarounds_apply(struct drm_i915_private *dev_priv, { WA_GT("WaInPlaceDecompressionHang"), ALL_REVS, REG(GEN9_GAMT_ECO_REG_RW_IA), SET_BIT(GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS) }, + + { WA_GT("WaDisableSDEUnitClockGating"), + REVS(0, KBL_REVID_B0), REG(GEN8_UCGCTL6), + SET_BIT(GEN8_SDEUNIT_CLOCK_GATE_DISABLE) }, + + { WA_GT("WaDisableGamClockGating"), + REVS(0, KBL_REVID_B0), REG(GEN6_UCGCTL1), + SET_BIT(GEN6_GAMUNIT_CLOCK_GATE_DISABLE) }, }; static struct i915_wa_reg glk_gt_was[] = { @@ -926,6 +934,9 @@ void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv) }; static struct i915_wa_reg kbl_disp_was[] = { + { WA_DISP("WaFbcNukeOnHostModify"), + ALL_REVS, REG(ILK_DPFC_CHICKEN), + SET_BIT(ILK_DPFC_NUKE_ON_ANY_MODIFICATION) }, }; static struct i915_wa_reg glk_disp_was[] = {