From patchwork Tue Nov 7 12:06:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10046531 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2FB2E60360 for ; Tue, 7 Nov 2017 11:37:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 288292A148 for ; Tue, 7 Nov 2017 11:37:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 141802A140; Tue, 7 Nov 2017 11:37:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 692F22A163 for ; Tue, 7 Nov 2017 11:36:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 12BE06E49C; Tue, 7 Nov 2017 11:36:17 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id CAAB86E48A; Tue, 7 Nov 2017 11:36:15 +0000 (UTC) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 07 Nov 2017 03:36:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,358,1505804400"; d="scan'208";a="146850159" Received: from ubuntu-tc11.iind.intel.com ([10.223.25.173]) by orsmga004.jf.intel.com with ESMTP; 07 Nov 2017 03:36:13 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 7 Nov 2017 17:36:29 +0530 Message-Id: <1510056391-9684-6-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1510056391-9684-1-git-send-email-uma.shankar@intel.com> References: <1510056391-9684-1-git-send-email-uma.shankar@intel.com> Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com Subject: [Intel-gfx] [RFC 5/7] drm/i915: Enable plane color features X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Enable and initialize plane color features. v2: Rebase and some cleanup Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_drv.h | 10 ++++++++++ drivers/gpu/drm/i915/intel_color.c | 12 ++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 9 +++++++++ 3 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fe93115..6c91b5f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -744,6 +744,11 @@ struct drm_i915_display_funcs { void (*load_csc_matrix)(struct drm_crtc_state *crtc_state); void (*load_luts)(struct drm_crtc_state *crtc_state); + /* Add Plane Color callbacks */ + void (*load_plane_csc_matrix)(const struct drm_plane_state + *plane_state); + void (*load_plane_luts)(const struct drm_plane_state + *plane_state); }; #define CSR_VERSION(major, minor) ((major) << 16 | (minor)) @@ -890,6 +895,11 @@ struct intel_device_info { u16 degamma_lut_size; u16 gamma_lut_size; } color; + + struct plane_color_luts { + u16 plane_degamma_lut_size; + u16 plane_gamma_lut_size; + } plane_color; }; struct intel_display_error_state; diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c index b8315bc..f2481f1 100644 --- a/drivers/gpu/drm/i915/intel_color.c +++ b/drivers/gpu/drm/i915/intel_color.c @@ -641,6 +641,18 @@ int intel_color_check(struct drm_crtc *crtc, return -EINVAL; } +void intel_plane_color_init(struct drm_plane *plane) +{ + struct drm_i915_private *dev_priv = to_i915(plane->dev); + + /* Enable color management support when we have degamma & gamma LUTs. */ + if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 && + INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0) + drm_plane_enable_color_mgmt(plane, + INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size, + true, INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size); +} + void intel_color_init(struct drm_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(crtc->dev); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 00b4886..eb90d11 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -445,6 +445,14 @@ struct intel_plane_state { */ int scaler_id; + /* + * Use reduced/limited/broadcast rbg range, compressing from the full + * range fed into the crtcs. + */ + bool limited_color_range; + /* Gamma mode programmed on the plane */ + uint32_t gamma_mode; + struct drm_intel_sprite_colorkey ckey; }; @@ -2018,6 +2026,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state); void intel_color_set_csc(struct drm_crtc_state *crtc_state); void intel_color_load_luts(struct drm_crtc_state *crtc_state); +void intel_plane_color_init(struct drm_plane *plane); /* intel_lspcon.c */ bool lspcon_init(struct intel_digital_port *intel_dig_port);