diff mbox

[v9,1/8] drm/i915 : Unifying seq_puts messages for feature support

Message ID 1510358798-21566-2-git-send-email-sujaritha.sundaresan@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Sundaresan, Sujaritha Nov. 11, 2017, 12:06 a.m. UTC
Unifying the various seq_puts messages in debugfs to the simplest one for
feature support.

v2: Clarifying the commit message (Anusha)

v3: Re-factoring code as per review (Michal)

v4: Rebase

v5: Split from following patch

v6: Re-factoring code (Michal, Sagar)
    Clarifying commit message (Sagar)

v7: Generalizing subject to drm/i915 (Sagar)

v8: Omitting DRRS seq_puts unification (Michal)

v9: Including the HAS_HUC condition (Michal)
    Updating more functions with unified message (Sagar)

Suggested by : Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 53 +++++++++++++++++++++++++------------
 1 file changed, 36 insertions(+), 17 deletions(-)

Comments

Chris Wilson Nov. 11, 2017, 1:04 a.m. UTC | #1
Quoting Sujaritha Sundaresan (2017-11-11 00:06:31)
> Unifying the various seq_puts messages in debugfs to the simplest one for
> feature support.

i.e. -ENODEV.
-Chris
Michal Wajdeczko Nov. 12, 2017, 4:18 p.m. UTC | #2
On Sat, 11 Nov 2017 01:06:31 +0100, Sujaritha Sundaresan  
<sujaritha.sundaresan@intel.com> wrote:

> Unifying the various seq_puts messages in debugfs to the simplest one for
> feature support.
>
> v2: Clarifying the commit message (Anusha)
>
> v3: Re-factoring code as per review (Michal)
>
> v4: Rebase
>
> v5: Split from following patch
>
> v6: Re-factoring code (Michal, Sagar)
>     Clarifying commit message (Sagar)
>
> v7: Generalizing subject to drm/i915 (Sagar)
>
> v8: Omitting DRRS seq_puts unification (Michal)
>
> v9: Including the HAS_HUC condition (Michal)
>     Updating more functions with unified message (Sagar)
>
> Suggested by : Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 53  
> +++++++++++++++++++++++++------------
>  1 file changed, 36 insertions(+), 17 deletions(-)
>

<snip>

> @@ -2361,8 +2361,10 @@ static int i915_huc_load_status_info(struct  
> seq_file *m, void *data)
>  	struct drm_i915_private *dev_priv = node_to_i915(m->private);
>  	struct drm_printer p;
> -	if (!HAS_HUC_UCODE(dev_priv))
> +	if (!HAS_HUC(dev_priv)) {

Hmm, HAS_HUC is not available yet, it will be introduced by patch 2/8

<snip>

> @@ -2461,9 +2465,11 @@ static bool check_guc_submission(struct seq_file  
> *m)
> 	if (!guc->execbuf_client) {
>  		seq_printf(m, "GuC submission %s\n",
> -			   HAS_GUC_SCHED(dev_priv) ?
> -			   "disabled" :
> -			   "not supported");
> +				HAS_GUC(dev_priv) ?
> +				"not supported" :
> +				NEEDS_GUC_FW(dev_priv) ?

NEEDS_GUC_FW will also be introduced by patch 2/8

Michal
Sundaresan, Sujaritha Nov. 14, 2017, 6:44 p.m. UTC | #3
On 11/12/2017 08:18 AM, Michal Wajdeczko wrote:
> On Sat, 11 Nov 2017 01:06:31 +0100, Sujaritha Sundaresan 
> <sujaritha.sundaresan@intel.com> wrote:
>
>> Unifying the various seq_puts messages in debugfs to the simplest one 
>> for
>> feature support.
>>
>> v2: Clarifying the commit message (Anusha)
>>
>> v3: Re-factoring code as per review (Michal)
>>
>> v4: Rebase
>>
>> v5: Split from following patch
>>
>> v6: Re-factoring code (Michal, Sagar)
>>     Clarifying commit message (Sagar)
>>
>> v7: Generalizing subject to drm/i915 (Sagar)
>>
>> v8: Omitting DRRS seq_puts unification (Michal)
>>
>> v9: Including the HAS_HUC condition (Michal)
>>     Updating more functions with unified message (Sagar)
>>
>> Suggested by : Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Oscar Mateo <oscar.mateo@intel.com>
>> Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_debugfs.c | 53 
>> +++++++++++++++++++++++++------------
>>  1 file changed, 36 insertions(+), 17 deletions(-)
>>
>
> <snip>
>
>> @@ -2361,8 +2361,10 @@ static int i915_huc_load_status_info(struct 
>> seq_file *m, void *data)
>>      struct drm_i915_private *dev_priv = node_to_i915(m->private);
>>      struct drm_printer p;
>> -    if (!HAS_HUC_UCODE(dev_priv))
>> +    if (!HAS_HUC(dev_priv)) {
>
> Hmm, HAS_HUC is not available yet, it will be introduced by patch 2/8
>
> <snip>
>
>> @@ -2461,9 +2465,11 @@ static bool check_guc_submission(struct 
>> seq_file *m)
>>     if (!guc->execbuf_client) {
>>          seq_printf(m, "GuC submission %s\n",
>> -               HAS_GUC_SCHED(dev_priv) ?
>> -               "disabled" :
>> -               "not supported");
>> +                HAS_GUC(dev_priv) ?
>> +                "not supported" :
>> +                NEEDS_GUC_FW(dev_priv) ?
>
> NEEDS_GUC_FW will also be introduced by patch 2/8
>
> Michal

I will not make the macro changes in this patch. I will also move this 
patch out of the series,
as Sagar had suggested in a review to a previous version, since there 
will be no dependence
on any of the other changes.

Thanks for the review :)

Regards,
Sujaritha
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index add6af4..462e448 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1641,7 +1641,7 @@  static int i915_fbc_status(struct seq_file *m, void *unused)
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
 
 	if (!HAS_FBC(dev_priv)) {
-		seq_puts(m, "FBC unsupported on this chipset\n");
+		seq_puts(m, "not supported\n");
 		return 0;
 	}
 
@@ -1809,7 +1809,7 @@  static int i915_ring_freq_table(struct seq_file *m, void *unused)
 	unsigned int max_gpu_freq, min_gpu_freq;
 
 	if (!HAS_LLC(dev_priv)) {
-		seq_puts(m, "unsupported on this chipset\n");
+		seq_puts(m, "not supported\n");
 		return 0;
 	}
 
@@ -2361,8 +2361,10 @@  static int i915_huc_load_status_info(struct seq_file *m, void *data)
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
 	struct drm_printer p;
 
-	if (!HAS_HUC_UCODE(dev_priv))
+	if (!HAS_HUC(dev_priv)) {
+		seq_puts(m, "not supported\n");
 		return 0;
+	}
 
 	p = drm_seq_file_printer(m);
 	intel_uc_fw_dump(&dev_priv->huc.fw, &p);
@@ -2380,8 +2382,10 @@  static int i915_guc_load_status_info(struct seq_file *m, void *data)
 	struct drm_printer p;
 	u32 tmp, i;
 
-	if (!HAS_GUC_UCODE(dev_priv))
+	if (!HAS_GUC(dev_priv)) {
+		seq_puts(m, "not supported\n");
 		return 0;
+	}
 
 	p = drm_seq_file_printer(m);
 	intel_uc_fw_dump(&dev_priv->guc.fw, &p);
@@ -2461,9 +2465,11 @@  static bool check_guc_submission(struct seq_file *m)
 
 	if (!guc->execbuf_client) {
 		seq_printf(m, "GuC submission %s\n",
-			   HAS_GUC_SCHED(dev_priv) ?
-			   "disabled" :
-			   "not supported");
+				HAS_GUC(dev_priv) ?
+				"not supported" :
+				NEEDS_GUC_FW(dev_priv) ?
+				"disabled" :
+				"failed");
 		return false;
 	}
 
@@ -2652,7 +2658,7 @@  static int i915_edp_psr_status(struct seq_file *m, void *data)
 	bool enabled = false;
 
 	if (!HAS_PSR(dev_priv)) {
-		seq_puts(m, "PSR not supported\n");
+		seq_puts(m, "not supported\n");
 		return 0;
 	}
 
@@ -2805,7 +2811,7 @@  static int i915_runtime_pm_status(struct seq_file *m, void *unused)
 	struct pci_dev *pdev = dev_priv->drm.pdev;
 
 	if (!HAS_RUNTIME_PM(dev_priv))
-		seq_puts(m, "Runtime power management not supported\n");
+		seq_puts(m, "not supported\n");
 
 	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake));
 	seq_printf(m, "IRQs disabled: %s\n",
@@ -3407,9 +3413,13 @@  static int i915_ipc_status_show(struct seq_file *m, void *data)
 static int i915_ipc_status_open(struct inode *inode, struct file *file)
 {
 	struct drm_i915_private *dev_priv = inode->i_private;
+	struct seq_file *m;
 
-	if (!HAS_IPC(dev_priv))
-		return -ENODEV;
+	if (!HAS_IPC(dev_priv)) {
+		seq_puts(m, "not supported\n");
+		return 0;
+	}
+
 
 	return single_open(file, i915_ipc_status_show, dev_priv);
 }
@@ -3914,9 +3924,12 @@  static int cur_wm_latency_show(struct seq_file *m, void *data)
 static int pri_wm_latency_open(struct inode *inode, struct file *file)
 {
 	struct drm_i915_private *dev_priv = inode->i_private;
+	struct seq_file *m;
 
-	if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv))
-		return -ENODEV;
+	if (INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv)) {
+		seq_puts(m, "not supported\n");
+		return 0;
+	}
 
 	return single_open(file, pri_wm_latency_show, dev_priv);
 }
@@ -3924,9 +3937,12 @@  static int pri_wm_latency_open(struct inode *inode, struct file *file)
 static int spr_wm_latency_open(struct inode *inode, struct file *file)
 {
 	struct drm_i915_private *dev_priv = inode->i_private;
+	struct seq_file *m;
 
-	if (HAS_GMCH_DISPLAY(dev_priv))
-		return -ENODEV;
+	if (HAS_GMCH_DISPLAY(dev_priv)) {
+		seq_puts(m, "not supported\n");
+		return 0;
+	}
 
 	return single_open(file, spr_wm_latency_show, dev_priv);
 }
@@ -3934,9 +3950,12 @@  static int spr_wm_latency_open(struct inode *inode, struct file *file)
 static int cur_wm_latency_open(struct inode *inode, struct file *file)
 {
 	struct drm_i915_private *dev_priv = inode->i_private;
+	struct seq_file *m;
 
-	if (HAS_GMCH_DISPLAY(dev_priv))
-		return -ENODEV;
+	if (HAS_GMCH_DISPLAY(dev_priv)) {
+		seq_puts(m, "not supported\n");
+		return 0;
+	}
 
 	return single_open(file, cur_wm_latency_show, dev_priv);
 }