| Message ID | 1511770575-8281-1-git-send-email-valtteri.rantala@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Nov 27, 2017 at 08:16:15AM +0000, Valtteri Rantala wrote: > Testing the texture read performance shows that the same tuning for > the SQ credits is needed on GLK as on BXT/APL. This has been also > confirmed by Altug from the HW team. > > V3: Rebase + fix > Signed-off-by: Valtteri Rantala <valtteri.rantala@intel.com> It also matches wa_database, so: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/intel_engine_cs.c | 15 +++++++++------ > 1 file changed, 9 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c > index fede62d..a9c1053 100644 > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > @@ -1067,6 +1067,15 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine) > /* WaDisableSTUnitPowerOptimization:skl,bxt,kbl,glk,cfl */ > WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE); > > + /* WaProgramL3SqcReg1DefaultForPerf:bxt,glk */ > + if (IS_GEN9_LP(dev_priv)) { > + u32 val = I915_READ(GEN8_L3SQCREG1); > + > + val &= ~L3_PRIO_CREDITS_MASK; > + val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2); > + I915_WRITE(GEN8_L3SQCREG1, val); > + } > + > /* WaOCLCoherentLineFlush:skl,bxt,kbl,cfl */ > I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) | > GEN8_LQSC_FLUSH_COHERENT_LINES)); > @@ -1199,12 +1208,6 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine) > I915_WRITE(FF_SLICE_CS_CHICKEN2, > _MASKED_BIT_ENABLE(GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE)); > > - /* WaProgramL3SqcReg1DefaultForPerf:bxt */ > - val = I915_READ(GEN8_L3SQCREG1); > - val &= ~L3_PRIO_CREDITS_MASK; > - val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2); > - I915_WRITE(GEN8_L3SQCREG1, val); > - > /* WaToEnableHwFixForPushConstHWBug:bxt */ > WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, > GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION); > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Nov 27, 2017 at 08:20:26AM +0000, Patchwork wrote: > == Series Details == > > Series: drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too (rev3) > URL : https://patchwork.freedesktop.org/series/33772/ > State : failure > > == Summary == > > CHK include/config/kernel.release > CHK include/generated/uapi/linux/version.h > CHK include/generated/utsrelease.h > CHK include/generated/bounds.h > CHK include/generated/timeconst.h > CHK include/generated/asm-offsets.h > CALL scripts/checksyscalls.sh > DESCEND objtool > CHK scripts/mod/devicetable-offsets.h > CHK include/generated/compile.h > CHK kernel/config_data.h > CC [M] drivers/gpu/drm/i915/intel_engine_cs.o > drivers/gpu/drm/i915/intel_engine_cs.c: In function ‘bxt_init_workarounds’: > drivers/gpu/drm/i915/intel_engine_cs.c:1196:6: error: unused variable ‘val’ [-Werror=unused-variable] > u32 val; ops... rv-b after removing "val"... > ^~~ > cc1: all warnings being treated as errors > scripts/Makefile.build:314: recipe for target 'drivers/gpu/drm/i915/intel_engine_cs.o' failed > make[4]: *** [drivers/gpu/drm/i915/intel_engine_cs.o] Error 1 > scripts/Makefile.build:573: recipe for target 'drivers/gpu/drm/i915' failed > make[3]: *** [drivers/gpu/drm/i915] Error 2 > scripts/Makefile.build:573: recipe for target 'drivers/gpu/drm' failed > make[2]: *** [drivers/gpu/drm] Error 2 > scripts/Makefile.build:573: recipe for target 'drivers/gpu' failed > make[1]: *** [drivers/gpu] Error 2 > Makefile:1024: recipe for target 'drivers' failed > make: *** [drivers] Error 2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index fede62d..a9c1053 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -1067,6 +1067,15 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine) /* WaDisableSTUnitPowerOptimization:skl,bxt,kbl,glk,cfl */ WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE); + /* WaProgramL3SqcReg1DefaultForPerf:bxt,glk */ + if (IS_GEN9_LP(dev_priv)) { + u32 val = I915_READ(GEN8_L3SQCREG1); + + val &= ~L3_PRIO_CREDITS_MASK; + val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2); + I915_WRITE(GEN8_L3SQCREG1, val); + } + /* WaOCLCoherentLineFlush:skl,bxt,kbl,cfl */ I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) | GEN8_LQSC_FLUSH_COHERENT_LINES)); @@ -1199,12 +1208,6 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine) I915_WRITE(FF_SLICE_CS_CHICKEN2, _MASKED_BIT_ENABLE(GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE)); - /* WaProgramL3SqcReg1DefaultForPerf:bxt */ - val = I915_READ(GEN8_L3SQCREG1); - val &= ~L3_PRIO_CREDITS_MASK; - val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2); - I915_WRITE(GEN8_L3SQCREG1, val); - /* WaToEnableHwFixForPushConstHWBug:bxt */ WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2, GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
Testing the texture read performance shows that the same tuning for the SQ credits is needed on GLK as on BXT/APL. This has been also confirmed by Altug from the HW team. V3: Rebase + fix Signed-off-by: Valtteri Rantala <valtteri.rantala@intel.com> --- drivers/gpu/drm/i915/intel_engine_cs.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)