From patchwork Tue Dec 5 07:48:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kevin.rogovin@intel.com X-Patchwork-Id: 10092393 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2E69D60327 for ; Tue, 5 Dec 2017 07:48:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 208AA292C4 for ; Tue, 5 Dec 2017 07:48:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 152C5294F3; Tue, 5 Dec 2017 07:48:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B85C9292C4 for ; Tue, 5 Dec 2017 07:48:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B8E4A6E40C; Tue, 5 Dec 2017 07:48:23 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id C4FCD6E40C for ; Tue, 5 Dec 2017 07:48:21 +0000 (UTC) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Dec 2017 23:48:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,363,1508828400"; d="scan'208";a="181454349" Received: from bdzido-mobl.ger.corp.intel.com (HELO LittleBigTrouble.ger.corp.intel.com) ([10.252.6.207]) by orsmga005.jf.intel.com with ESMTP; 04 Dec 2017 23:48:20 -0800 From: kevin.rogovin@intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 5 Dec 2017 09:48:13 +0200 Message-Id: <1512460094-4615-3-git-send-email-kevin.rogovin@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512460094-4615-1-git-send-email-kevin.rogovin@intel.com> References: <1512460094-4615-1-git-send-email-kevin.rogovin@intel.com> Cc: Kevin Rogovin Subject: [Intel-gfx] [PATCH 2/3] i965: define stuff for scratch page checking in intel_screen X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Kevin Rogovin --- src/intel/common/gen_debug.c | 1 + src/intel/common/gen_debug.h | 1 + src/mesa/drivers/dri/i965/intel_screen.c | 26 ++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/intel_screen.h | 12 ++++++++++++ 4 files changed, 40 insertions(+) diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c index f58c593c44..7bd6723311 100644 --- a/src/intel/common/gen_debug.c +++ b/src/intel/common/gen_debug.c @@ -84,6 +84,7 @@ static const struct debug_control debug_control[] = { { "nohiz", DEBUG_NO_HIZ }, { "color", DEBUG_COLOR }, { "reemit", DEBUG_REEMIT }, + { "check_scratch", DEBUG_CHECK_SCRATH }, { NULL, 0 } }; diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h index e418e3fb16..5e224a45f0 100644 --- a/src/intel/common/gen_debug.h +++ b/src/intel/common/gen_debug.h @@ -83,6 +83,7 @@ extern uint64_t INTEL_DEBUG; #define DEBUG_NO_HIZ (1ull << 39) #define DEBUG_COLOR (1ull << 40) #define DEBUG_REEMIT (1ull << 41) +#define DEBUG_CHECK_SCRATH (1ull << 42) #ifdef HAVE_ANDROID_PLATFORM #define LOG_TAG "INTEL-MESA" diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 38769babf0..044be8fe85 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1557,6 +1557,12 @@ intelDestroyScreen(__DRIscreen * sPriv) brw_bufmgr_destroy(screen->bufmgr); driDestroyOptionInfo(&screen->optionCache); + if (screen->debug_batchbuffer.enabled) { + simple_mtx_destroy(&screen->debug_batchbuffer.mutex); + free(screen->debug_batchbuffer.noise_values); + free(screen->debug_batchbuffer.tmp); + } + ralloc_free(screen); sPriv->driverPrivate = NULL; } @@ -2610,6 +2616,26 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen) } } + screen->debug_batchbuffer.enabled = false; + if (INTEL_DEBUG & DEBUG_CHECK_SCRATH) { + struct drm_i915_scratch_page sc; + int err; + + sc.buffer_size = 0; + sc.buffer_ptr = 0; + err = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_READ_SCRATCH_PAGE, &sc); + if (err == 0) { + screen->debug_batchbuffer.enabled = true; + simple_mtx_init(&screen->debug_batchbuffer.mutex, mtx_plain); + screen->debug_batchbuffer.buffer_size = sc.buffer_size; + screen->debug_batchbuffer.noise_values = calloc(screen->debug_batchbuffer.buffer_size, 1); + screen->debug_batchbuffer.tmp = calloc(screen->debug_batchbuffer.buffer_size, 1); + for (uint64_t i = 0; i < screen->debug_batchbuffer.buffer_size; ++i) { + screen->debug_batchbuffer.noise_values[i] = rand() & 0xFF; + } + } + } + return (const __DRIconfig**) intel_screen_make_configs(dri_screen); } diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h index 7948617b7f..7d56106aa2 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.h +++ b/src/mesa/drivers/dri/i965/intel_screen.h @@ -37,6 +37,7 @@ #include "common/gen_device_info.h" #include "i915_drm.h" #include "util/xmlconfig.h" +#include "util/simple_mtx.h" #include "isl/isl.h" @@ -114,6 +115,17 @@ struct intel_screen */ int eu_total; + /** + * Struct to perform out-of-bound GEM BO write checking + */ + struct { + bool enabled; + simple_mtx_t mutex; + uint32_t buffer_size; + uint8_t *noise_values; + uint8_t *tmp; + } debug_batchbuffer; + bool mesa_format_supports_texture[MESA_FORMAT_COUNT]; bool mesa_format_supports_render[MESA_FORMAT_COUNT]; enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT];