From patchwork Fri Dec 8 08:02:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kevin.rogovin@intel.com X-Patchwork-Id: 10101731 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6B242602A0 for ; Fri, 8 Dec 2017 08:02:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5C9B928B1C for ; Fri, 8 Dec 2017 08:02:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5180228B1E; Fri, 8 Dec 2017 08:02:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 02A5C28B1C for ; Fri, 8 Dec 2017 08:02:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 823306E8B0; Fri, 8 Dec 2017 08:02:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id E1C7D6E8AA for ; Fri, 8 Dec 2017 08:02:49 +0000 (UTC) Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Dec 2017 00:02:49 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,377,1508828400"; d="scan'208";a="1105792" Received: from dcraig1-mobl1.amr.corp.intel.com (HELO LittleBigTrouble.ger.corp.intel.com) ([10.252.5.15]) by orsmga008.jf.intel.com with ESMTP; 08 Dec 2017 00:02:48 -0800 From: kevin.rogovin@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 8 Dec 2017 10:02:39 +0200 Message-Id: <1512720159-6843-4-git-send-email-kevin.rogovin@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512720159-6843-1-git-send-email-kevin.rogovin@intel.com> References: <1512720159-6843-1-git-send-email-kevin.rogovin@intel.com> Cc: Kevin Rogovin Subject: [Intel-gfx] [PATCH 3/3] i965: implement (per-context) scratch page checking X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Kevin Rogovin --- src/mesa/drivers/dri/i965/brw_context.c | 30 +++++++++++++++++++++++++++ src/mesa/drivers/dri/i965/brw_context.h | 10 +++++++++ src/mesa/drivers/dri/i965/intel_batchbuffer.c | 15 +++++++++++++- 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 126c187f62..8e1afdc859 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -844,6 +844,7 @@ brwCreateContext(gl_api api, { struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate; + __DRIscreen *dri_screen = screen->driScrnPriv; const struct gen_device_info *devinfo = &screen->devinfo; struct dd_function_table functions; @@ -1078,6 +1079,30 @@ brwCreateContext(gl_api api, brw_disk_cache_init(brw); + brw->scratch.size = 0; + if (brw->hw_ctx && (INTEL_DEBUG & DEBUG_CHECK_SCRATCH_PAGE)) { + struct drm_i915_gem_context_param p; + int ret; + + p.ctx_id = brw->hw_ctx; + p.size = 0; + p.param = I915_CONTEXT_PARAM_SCRATCH_PAGE_CONTENTS; + p.value = 0; + ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &p); + if (ret == 0 && p.size > 0) { + brw->scratch.size = p.size; + brw->scratch.values = calloc(brw->scratch.size, 1); + brw->scratch.tmp = calloc(brw->scratch.size, 1); + for (uint64_t i = 0; i < brw->scratch.size; ++i) { + brw->scratch.values[i] = rand() & 0xFF; + } + p.value = (__u64) (uintptr_t) brw->scratch.values; + ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p); + assert(ret == 0); + assert(p.size == brw->scratch.size); + } + } + return true; } @@ -1140,6 +1165,11 @@ intelDestroyContext(__DRIcontext * driContextPriv) driDestroyOptionCache(&brw->optionCache); + if (brw->scratch.size > 0) { + free(brw->scratch.values); + free(brw->scratch.tmp); + } + /* free the Mesa context */ _mesa_free_context_data(&brw->ctx); diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 0f0aad8534..e73eab9160 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1263,6 +1263,16 @@ struct brw_context */ bool draw_aux_buffer_disabled[MAX_DRAW_BUFFERS]; + /* Checking the scratch page to detect out-of-bounds writes + * by the GPU; a zero value on the scratch size indicates + * that scratch page checking is not enabled. + */ + struct { + uint8_t *values; + uint8_t *tmp; + uint64_t size; + } scratch; + __DRIcontext *driContext; struct intel_screen *screen; }; diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 91a6506a89..2e4e7747d0 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -936,9 +936,22 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw, ret = submit_batch(brw, in_fence_fd, out_fence_fd); - if (unlikely(INTEL_DEBUG & DEBUG_SYNC)) { + if (unlikely((INTEL_DEBUG & DEBUG_SYNC) || brw->scratch.size > 0)) { fprintf(stderr, "waiting for idle\n"); brw_bo_wait_rendering(brw->batch.batch.bo); + if (brw->scratch.size > 0) { + struct drm_i915_gem_context_param p; + int ret; + + p.ctx_id = brw->hw_ctx; + p.size = brw->scratch.size; + p.param = I915_CONTEXT_PARAM_SCRATCH_PAGE_CONTENTS; + p.value = (__u64) (uintptr_t) brw->scratch.tmp; + ret = drmIoctl(brw->screen->driScrnPriv->fd, DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM, &p); + assert(ret == 0); + assert(p.size == brw->scratch.size); + assert(memcmp(brw->scratch.tmp, brw->scratch.values, brw->scratch.size) == 0); + } } /* Start a new batch buffer. */