From patchwork Mon Mar 26 05:13:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srinivas, Vidya" X-Patchwork-Id: 10307131 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8FAB260212 for ; Mon, 26 Mar 2018 05:16:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78779286B2 for ; Mon, 26 Mar 2018 05:16:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6D14128776; Mon, 26 Mar 2018 05:16:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 29EC4286B2 for ; Mon, 26 Mar 2018 05:16:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A3EA6E374; Mon, 26 Mar 2018 05:16:57 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1654F6E372 for ; Mon, 26 Mar 2018 05:16:56 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Mar 2018 22:16:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,363,1517904000"; d="scan'208";a="40588626" Received: from vsrini4-ubuntu.iind.intel.com ([10.223.161.6]) by fmsmga004.fm.intel.com with ESMTP; 25 Mar 2018 22:16:53 -0700 From: Vidya Srinivas To: intel-gfx@lists.freedesktop.org Date: Mon, 26 Mar 2018 10:43:43 +0530 Message-Id: <1522041233-26726-9-git-send-email-vidya.srinivas@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522041233-26726-1-git-send-email-vidya.srinivas@intel.com> References: <1522041233-26726-1-git-send-email-vidya.srinivas@intel.com> Subject: [Intel-gfx] [PATCH v16 08/18] drm/i915/skl+: nv12 workaround disable WM level 1-7 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, Vidya Srinivas , maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Mahesh Kumar Display Workaround #0826 (SKL:ALL BXT:ALL) & #1059(CNL:A) Hardware sometimes fails to wake memory from pkg C states fetching the last few lines of planar YUV 420 (NV12) planes. This causes intermittent underflow and corruption. WA: Disable package C states or do not enable latency levels 1 through 7 (WM1 - WM7) on NV12 planes. v2: Addressed review comments by Maarten. v3: Adding reviewed by tag from Shashank Sharma v4: Added reviewed by from Juha-Pekka Heikkila v5: Rebased the series Reviewed-by: Juha-Pekka Heikkila Reviewed-by: Shashank Sharma Reviewed-by: Maarten Lankhorst Signed-off-by: Mahesh Kumar Signed-off-by: Vidya Srinivas --- drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index b318a27..3210868 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4653,6 +4653,17 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, } } + /* + * Display WA #826 (SKL:ALL, BXT:ALL) & #1059 (CNL:A) + * disable wm level 1-7 on NV12 planes + */ + if (wp->is_planar && level >= 1 && + (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) || + IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) { + result->plane_en = false; + return 0; + } + /* The number of lines are ignored for the level 0 watermark. */ result->plane_res_b = res_blocks; result->plane_res_l = res_lines;