From patchwork Tue Mar 27 10:26:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: kevin.rogovin@intel.com X-Patchwork-Id: 10309697 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AB71E600F6 for ; Tue, 27 Mar 2018 10:26:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9700229BE6 for ; Tue, 27 Mar 2018 10:26:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8AD2A29BE8; Tue, 27 Mar 2018 10:26:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 29A6C29BE6 for ; Tue, 27 Mar 2018 10:26:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C48A6E5D9; Tue, 27 Mar 2018 10:26:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id D332E6E5D9 for ; Tue, 27 Mar 2018 10:26:43 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Mar 2018 03:26:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,367,1517904000"; d="scan'208";a="38466879" Received: from sinekoff-mobl1.ger.corp.intel.com (HELO LittleBigTrouble.ger.corp.intel.com) ([10.252.34.146]) by orsmga003.jf.intel.com with ESMTP; 27 Mar 2018 03:26:26 -0700 From: kevin.rogovin@intel.com To: intel-gfx@lists.freedesktop.org, abdiel.janulgue@linux.intel.com, joonas.lahtinen@linux.intel.com Date: Tue, 27 Mar 2018 13:26:16 +0300 Message-Id: <1522146379-9358-3-git-send-email-kevin.rogovin@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1522146379-9358-1-git-send-email-kevin.rogovin@intel.com> References: <1522146379-9358-1-git-send-email-kevin.rogovin@intel.com> Subject: [Intel-gfx] [PATCH v3 2/5] i915: add documentation of what happens at the bottom of submitting a batchbuffer X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Rogovin MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Kevin Rogovin Signed-off-by: Kevin Rogovin --- drivers/gpu/drm/i915/intel_ringbuffer.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 1f50727..62d3a22 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -317,6 +317,39 @@ struct intel_engine_execlists { #define INTEL_ENGINE_CS_MAX_NAME 8 +/** + * DOC: Ringbuffers to submit batchbuffers + * + * At the lowest level, submitting work to a GPU engine is to add commands to + * a ringbuffer. A ringbuffer in the kernel driver is essentially a location + * from which the GPU reads its next command. To avoid copying the contents + * of a batchbuffer in order to submit it, the GPU has native hardware support + * to perform commands specified in another buffer; the command to do so is + * a batchbuffer start and the i915 kernel driver uses this to avoid copying + * batchbuffers to the ringbuffer. At the very bottom of the stack, the i915 + * does the following to submit a batchbuffer to the GPU. + * + * 1. Add a command to invalidate caches to the ringbuffer + * + * 2. Add a batchbuffer start command to the ringbuffer. The start command is + * essentially a token together with the GPU address of the batchbuffer to + * be executed. + * + * 3. Add a pipeline flush to the the ringbuffer. + * + * 4. Add a register write command to the ring buffer. This register write + * writes the the request ID, ``i915_request::global_seqno``; the i915 + * kernel driver uses the value in the register to know what requests are + * completed. + * + * 5. Add a user interrupt command to the ringbuffer. This command instructs + * the GPU to issue an interrupt when the command (and pipeline flush) are + * completed. + * + * 6. Inform the hardware of the additional commands added to + * the ringbuffer. + */ + struct intel_engine_cs { struct drm_i915_private *i915; char name[INTEL_ENGINE_CS_MAX_NAME];