From patchwork Thu Apr 12 15:29:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 10338899 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 529ED602D8 for ; Thu, 12 Apr 2018 15:35:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 456AC2013C for ; Thu, 12 Apr 2018 15:35:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 385D8201B0; Thu, 12 Apr 2018 15:35:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DACF12013C for ; Thu, 12 Apr 2018 15:35:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 591FB6E8D0; Thu, 12 Apr 2018 15:35:52 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9E4246E8CB for ; Thu, 12 Apr 2018 15:35:49 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Apr 2018 08:35:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,442,1517904000"; d="scan'208";a="45663757" Received: from mint-dev.iind.intel.com ([10.223.25.164]) by fmsmga004.fm.intel.com with ESMTP; 12 Apr 2018 08:35:47 -0700 From: Ramalingam C To: intel-gfx@lists.freedesktop.org, jani.nikula@linux.intel.com, daniel@ffwll.ch, chris@chris-wilson.co.uk, rodrigo.vivi@intel.com, ville.syrjala@linux.intel.com Date: Thu, 12 Apr 2018 20:59:52 +0530 Message-Id: <1523546992-20762-3-git-send-email-ramalingam.c@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1523546992-20762-1-git-send-email-ramalingam.c@intel.com> References: <1523546992-20762-1-git-send-email-ramalingam.c@intel.com> Subject: [Intel-gfx] [RFC 2/2] drm/i915/gmbus: Enable burst read X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Support for Burst read in HW is added for HDCP2.2 compliance requirement. This patch enables the burst read for all the gmbus read of more than 511Bytes, on capable platforms. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_i2c.c | 39 +++++++++++++++++++++++++++++++++++---- 2 files changed, 36 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4f583da0cee9..0ef162ee9ce0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2984,6 +2984,7 @@ enum i915_power_well_id { #define GMBUS_RATE_400KHZ (2<<8) /* reserved on Pineview */ #define GMBUS_RATE_1MHZ (3<<8) /* reserved on Pineview */ #define GMBUS_HOLD_EXT (1<<7) /* 300ns hold time, rsvd on Pineview */ +#define GMBUS_BYTE_CNT_OVERRIDE (1<<6) #define GMBUS_PIN_DISABLED 0 #define GMBUS_PIN_SSC 1 #define GMBUS_PIN_VGADDC 2 diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 7e92c7934657..ad65db6049c8 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -364,12 +364,24 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv) static int gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv, unsigned short addr, u8 *buf, unsigned int len, - u32 gmbus1_index) + u32 gmbus1_index, bool burst_read) { + unsigned int bytes_af_override, size; + + if (burst_read) { + bytes_af_override = len - (((len / 256) - 1) * 256); + size = bytes_af_override; + + I915_WRITE_FW(GMBUS0, (I915_READ_FW(GMBUS0) | + GMBUS_BYTE_CNT_OVERRIDE)); + } else { + size = len; + } + I915_WRITE_FW(GMBUS1, gmbus1_index | GMBUS_CYCLE_WAIT | - (len << GMBUS_BYTE_COUNT_SHIFT) | + (size << GMBUS_BYTE_COUNT_SHIFT) | (addr << GMBUS_SLAVE_ADDR_SHIFT) | GMBUS_SLAVE_READ | GMBUS_SW_RDY); while (len) { @@ -385,11 +397,23 @@ gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv, *buf++ = val & 0xff; val >>= 8; } while (--len && ++loop < 4); + + if (burst_read && len == (bytes_af_override - 4)) + I915_WRITE_FW(GMBUS0, (I915_READ_FW(GMBUS0) & + ~GMBUS_BYTE_CNT_OVERRIDE)); } return 0; } +static bool gmbus_burst_read_supported(struct drm_i915_private *dev_priv) +{ + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv) || + IS_KABYLAKE(dev_priv)) + return true; + return false; +} + static int gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg, u32 gmbus1_index) @@ -398,15 +422,22 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg, unsigned int rx_size = msg->len; unsigned int len; int ret; + bool burst_read = false; + + if (rx_size > BXT_GMBUS_BYTE_COUNT_MAX) + burst_read = gmbus_burst_read_supported(dev_priv); do { - if (INTEL_GEN(dev_priv) >= 9) + + if (burst_read) + len = rx_size; + else if (INTEL_GEN(dev_priv) >= 9) len = min(rx_size, BXT_GMBUS_BYTE_COUNT_MAX); else len = min(rx_size, GMBUS_BYTE_COUNT_MAX); ret = gmbus_xfer_read_chunk(dev_priv, msg->addr, - buf, len, gmbus1_index); + buf, len, gmbus1_index, burst_read); if (ret) return ret;