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[22/22] drm/i915/icl: WaAllowUMDToModifySamplerMode

Message ID 1524256446-28490-23-git-send-email-oscar.mateo@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

oscar.mateo@intel.com April 20, 2018, 8:34 p.m. UTC 
Required for Bindless samplers.

Do Linux UMDs make use of this? This change has been security
reviewed and the whitelisting approved. Virtualization of other
OSes could certainly use it.

v2: Rebased on top of the WA refactoring (Michel)

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h          | 2 ++
 drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
 2 files changed, 5 insertions(+)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d008a70..3394cc0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8258,6 +8258,8 @@  enum {
 #define TR_VA_TTL3_PTR_DW0		_MMIO(0x4DE0)
 #define TR_VA_TTL3_PTR_DW1		_MMIO(0x4DE4)
 
+#define GEN10_SAMPLER_MODE		_MMIO(0xE18C)
+
 /* IVYBRIDGE DPF */
 #define GEN7_L3CDERRST1(slice)		_MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */
 #define   GEN7_L3CDERRST1_ROW_MASK	(0x7ff<<14)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index b32caf6..5965dae 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -911,6 +911,9 @@  static void icl_whitelist_build(struct whitelist *w)
 	/* WaAllowUmdWriteTRTTRootTable:icl */
 	whitelist_reg(w, TR_VA_TTL3_PTR_DW0);
 	whitelist_reg(w, TR_VA_TTL3_PTR_DW1);
+
+	/* WaAllowUMDToModifySamplerMode:icl */
+	whitelist_reg(w, GEN10_SAMPLER_MODE);
 }
 
 static struct whitelist *whitelist_build(struct intel_engine_cs *engine,