From patchwork Wed May 2 20:34:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10376497 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CC29A6038F for ; Wed, 2 May 2018 20:35:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD8A028F9F for ; Wed, 2 May 2018 20:35:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B24C82900A; Wed, 2 May 2018 20:35:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 65ED728F9F for ; Wed, 2 May 2018 20:35:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 10D746E6A3; Wed, 2 May 2018 20:34:35 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id C267E6E5B1 for ; Wed, 2 May 2018 20:34:19 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 May 2018 13:34:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,354,1520924400"; d="scan'208";a="36380665" Received: from omateolo-linux.sc.intel.com ([10.3.229.22]) by fmsmga007.fm.intel.com with ESMTP; 02 May 2018 13:34:18 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Wed, 2 May 2018 13:34:20 -0700 Message-Id: <1525293261-13613-22-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525293261-13613-1-git-send-email-oscar.mateo@intel.com> References: <1525293261-13613-1-git-send-email-oscar.mateo@intel.com> Subject: [Intel-gfx] [PATCH 21/22] drm/i915/icl: WaAllowUmdWriteTRTTRootTable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Required for TR-TT (Tiled Resource Translation Table) support. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: For whatever reason, this ended up in KBL (??!!) v3: Rebased on top of the WA refactoring v4: Rebased on top of whitelist reg refactoring (Michel) Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_workarounds.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index fe44c99..a9866df 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8290,6 +8290,9 @@ enum { #define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080) #define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7) +#define TR_VA_TTL3_PTR_DW0 _MMIO(0x4DE0) +#define TR_VA_TTL3_PTR_DW1 _MMIO(0x4DE4) + /* IVYBRIDGE DPF */ #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */ #define GEN7_L3CDERRST1_ROW_MASK (0x7ff<<14) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 2f37ead..3c507d1 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -900,6 +900,10 @@ static void icl_whitelist_build(struct whitelist *w) /* WaAllowUMDToModifyHalfSliceChicken7:icl */ whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7); + + /* WaAllowUmdWriteTRTTRootTable:icl */ + whitelist_reg(w, TR_VA_TTL3_PTR_DW0); + whitelist_reg(w, TR_VA_TTL3_PTR_DW1); } static struct whitelist *whitelist_build(struct intel_engine_cs *engine,