From patchwork Tue May 8 21:29:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10387579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 71AE9602D8 for ; Tue, 8 May 2018 21:29:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 604D628DE4 for ; Tue, 8 May 2018 21:29:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5527828F7C; Tue, 8 May 2018 21:29:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0F8CB28DE4 for ; Tue, 8 May 2018 21:29:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C29F16EBAC; Tue, 8 May 2018 21:29:47 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91B2A6EB9F for ; Tue, 8 May 2018 21:29:37 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 May 2018 14:29:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,379,1520924400"; d="scan'208";a="54276976" Received: from omateolo-linux.sc.intel.com ([10.3.229.22]) by orsmga001.jf.intel.com with ESMTP; 08 May 2018 14:29:37 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Tue, 8 May 2018 14:29:34 -0700 Message-Id: <1525814984-20039-13-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525814984-20039-1-git-send-email-oscar.mateo@intel.com> References: <1525814984-20039-1-git-send-email-oscar.mateo@intel.com> Subject: [Intel-gfx] [PATCH 12/22] drm/i915/icl: Wa_1406838659 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Disable CGPSF unit clock gating to prevent an issue. v2: Rebased on top of the WA refactoring v3: Added References (Mika) v4: - Rebased - C, not lisp (Chris) - Remove unintentional whitespaces (Mika) - Fixed in C0 (Mika) References: HSDES#1406838659 Signed-off-by: Oscar Mateo Reviewed-by: Mika Kuoppala --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 7cb2ddc..ce48427 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3848,6 +3848,9 @@ enum { #define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434) #define VFUNIT_CLKGATE_DIS (1 << 20) +#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560) +#define CGPSF_CLKGATE_DIS (1 << 3) + /* * Display engine regs */ diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 2a4e3ee..942d322 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -755,6 +755,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) I915_WRITE(GEN10_L3_CHICKEN_MODE_REGISTER, I915_READ(GEN10_L3_CHICKEN_MODE_REGISTER) | GEN11_I2M_WRITE_DISABLE); + + /* Wa_1406838659:icl (pre-prod) */ + if (IS_ICL_REVID(dev_priv, ICL_REVID_A0, ICL_REVID_B0)) + I915_WRITE(INF_UNIT_LEVEL_CLKGATE, + I915_READ(INF_UNIT_LEVEL_CLKGATE) | + CGPSF_CLKGATE_DIS); } void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)