From patchwork Tue May 8 21:29:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10387573 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 483A7602D8 for ; Tue, 8 May 2018 21:29:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 36D3728DE4 for ; Tue, 8 May 2018 21:29:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B76528F7C; Tue, 8 May 2018 21:29:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D6E7628DE4 for ; Tue, 8 May 2018 21:29:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D5E2D6EBA5; Tue, 8 May 2018 21:29:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 02E666EB9D for ; Tue, 8 May 2018 21:29:39 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 May 2018 14:29:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,379,1520924400"; d="scan'208";a="54277009" Received: from omateolo-linux.sc.intel.com ([10.3.229.22]) by orsmga001.jf.intel.com with ESMTP; 08 May 2018 14:29:39 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Tue, 8 May 2018 14:29:44 -0700 Message-Id: <1525814984-20039-23-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1525814984-20039-1-git-send-email-oscar.mateo@intel.com> References: <1525814984-20039-1-git-send-email-oscar.mateo@intel.com> Subject: [Intel-gfx] [PATCH 22/22] drm/i915/icl: WaAllowUMDToModifySamplerMode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Required for Bindless samplers. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: Rebased on top of the WA refactoring (Michel) v3: Added References (Mika) References: HSDES#1404695891 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e41076f..c3e464c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8293,6 +8293,8 @@ enum { #define TR_VA_TTL3_PTR_DW0 _MMIO(0x4DE0) #define TR_VA_TTL3_PTR_DW1 _MMIO(0x4DE4) +#define GEN10_SAMPLER_MODE _MMIO(0xE18C) + /* IVYBRIDGE DPF */ #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */ #define GEN7_L3CDERRST1_ROW_MASK (0x7ff<<14) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 571b87a..f76ab3c 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -903,6 +903,9 @@ static void icl_whitelist_build(struct whitelist *w) /* WaAllowUmdWriteTRTTRootTable:icl */ whitelist_reg(w, TR_VA_TTL3_PTR_DW0); whitelist_reg(w, TR_VA_TTL3_PTR_DW1); + + /* WaAllowUMDToModifySamplerMode:icl */ + whitelist_reg(w, GEN10_SAMPLER_MODE); } static struct whitelist *whitelist_build(struct intel_engine_cs *engine,