From patchwork Fri May 25 22:05:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: oscar.mateo@intel.com X-Patchwork-Id: 10428641 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 52C236038C for ; Fri, 25 May 2018 22:05:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 456C62980B for ; Fri, 25 May 2018 22:05:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3A76A2981A; Fri, 25 May 2018 22:05:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F08082980B for ; Fri, 25 May 2018 22:05:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D89D6EB03; Fri, 25 May 2018 22:05:19 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id ACDAA6EAF7 for ; Fri, 25 May 2018 22:05:16 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 May 2018 15:05:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,441,1520924400"; d="scan'208";a="202551127" Received: from omateolo-linux.sc.intel.com ([10.3.229.22]) by orsmga004.jf.intel.com with ESMTP; 25 May 2018 15:05:16 -0700 From: Oscar Mateo To: intel-gfx@lists.freedesktop.org Date: Fri, 25 May 2018 15:05:37 -0700 Message-Id: <1527285939-20113-10-git-send-email-oscar.mateo@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1527285939-20113-1-git-send-email-oscar.mateo@intel.com> References: <1527285939-20113-1-git-send-email-oscar.mateo@intel.com> Subject: [Intel-gfx] [PATCH 09/11] drm/i915/icl: WaAllowUMDToModifySamplerMode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Required for Bindless samplers. Do Linux UMDs make use of this? This change has been security reviewed and the whitelisting approved. Virtualization of other OSes could certainly use it. v2: Rebased on top of the WA refactoring (Michel) v3: Added References (Mika) References: HSDES#1404695891 Cc: Mika Kuoppala Signed-off-by: Oscar Mateo --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_workarounds.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1fb86bd..42835d79 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8302,6 +8302,8 @@ enum { #define TR_VA_TTL3_PTR_DW0 _MMIO(0x4DE0) #define TR_VA_TTL3_PTR_DW1 _MMIO(0x4DE4) +#define GEN10_SAMPLER_MODE _MMIO(0xE18C) + /* IVYBRIDGE DPF */ #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD Error Status 1 */ #define GEN7_L3CDERRST1_ROW_MASK (0x7ff<<14) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 9d6b550..912f8b5 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -975,6 +975,9 @@ static void icl_whitelist_build(struct whitelist *w) /* WaAllowUmdWriteTRTTRootTable:icl */ whitelist_reg(w, TR_VA_TTL3_PTR_DW0); whitelist_reg(w, TR_VA_TTL3_PTR_DW1); + + /* WaAllowUMDToModifySamplerMode:icl */ + whitelist_reg(w, GEN10_SAMPLER_MODE); } static struct whitelist *whitelist_build(struct intel_engine_cs *engine,