From patchwork Fri Jun 15 18:31:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10467351 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4401C601C2 for ; Fri, 15 Jun 2018 18:31:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32BAC28E40 for ; Fri, 15 Jun 2018 18:31:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 308DD28E61; Fri, 15 Jun 2018 18:31:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 76CB828E6D for ; Fri, 15 Jun 2018 18:31:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A25936EBD1; Fri, 15 Jun 2018 18:31:19 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id 957AD6EBD1 for ; Fri, 15 Jun 2018 18:31:17 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from localhost (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP (TLS) id 12062160-1500050 for multiple; Fri, 15 Jun 2018 19:31:08 +0100 MIME-Version: 1.0 To: Kenneth Graunke , intel-gfx@lists.freedesktop.org From: Chris Wilson In-Reply-To: <20180614215328.2182-1-kenneth@whitecape.org> References: <20180614215328.2182-1-kenneth@whitecape.org> Message-ID: <152908746814.5287.6133927808318899309@mail.alporthouse.com> User-Agent: alot/0.3.6 Date: Fri, 15 Jun 2018 19:31:08 +0100 Subject: Re: [Intel-gfx] [PATCH] drm/i915: Enable provoking vertex fix on Gen9+ systems. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kenneth Graunke Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Quoting Kenneth Graunke (2018-06-14 22:53:28) > The SF and clipper units mishandle the provoking vertex in some cases, > which can cause misrendering with shaders that use flat shaded inputs. > > There are chicken bits in 3D_CHICKEN3 (for SF) and FF_SLICE_CHICKEN > (for the clipper) that work around the issue. These registers are > unfortunately not part of the logical context (even the power context). Indeed they are not. And that explains why we lose them in CI, my kbl never seems to powerdown and so never loses them. But an LRI from userspace to them is enough for their contents to be lost, and we never recover. So that rules out using the context image to store these registers, and we need to add a payload to every batch. We may get away with just using the per-context wa, to load the registers every time we switch into a context (and so also on load from idle). Instead we need: How crummy. -Chris diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index e935f8c45db8..46c93ccd36f3 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1565,11 +1565,21 @@ static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch) /* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt,glk */ batch = gen8_emit_flush_coherentl3_wa(engine, batch); + *batch++ = MI_LOAD_REGISTER_IMM(3); + /* WaDisableGatherAtSetShaderCommonSlice:skl,bxt,kbl,glk */ - *batch++ = MI_LOAD_REGISTER_IMM(1); *batch++ = i915_mmio_reg_offset(COMMON_SLICE_CHICKEN2); *batch++ = _MASKED_BIT_DISABLE( GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE); + + /* BSpec: 11391 */ + *batch++ = i915_mmio_reg_offset(FF_SLICE_CHICKEN); + *batch++ = _MASKED_BIT_ENABLE(FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX); + + /* BSpec: 11299 */ + *batch++ = i915_mmio_reg_offset(_3D_CHICKEN3); + *batch++ = _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_PROVOKING_VERTEX_FIX); + *batch++ = MI_NOOP; /* WaClearSlmSpaceAtContextSwitch:kbl */