From patchwork Wed Jun 20 21:02:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 10478727 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4351160210 for ; Wed, 20 Jun 2018 21:05:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3468427FE4 for ; Wed, 20 Jun 2018 21:05:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 28FE5283A5; Wed, 20 Jun 2018 21:05:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BF73C27FE4 for ; Wed, 20 Jun 2018 21:05:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D21EE6E7B4; Wed, 20 Jun 2018 21:05:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id C96756E212 for ; Wed, 20 Jun 2018 21:05:05 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jun 2018 14:05:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,249,1526367600"; d="scan'208";a="51537008" Received: from anusha-dev.jf.intel.com ([10.7.198.164]) by orsmga006.jf.intel.com with ESMTP; 20 Jun 2018 14:05:05 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Jun 2018 14:02:39 -0700 Message-Id: <1529528559-8492-2-git-send-email-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529528559-8492-1-git-send-email-anusha.srivatsa@intel.com> References: <1529528559-8492-1-git-send-email-anusha.srivatsa@intel.com> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/icl: implement icl_digital_port_connected() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi , Paulo Zanoni , Rodrigo Vivi MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Do like the other functions and check for the ISR bits. We have plans to add a few more checks in this code in the next patches, that's why it's a little more verbose than it could be. v2: - Change the register names, to be consistent with the rest of the platforms. Cc: Animesh Manna Cc: Lucas De Marchi Signed-off-by: Anusha Srivatsa Signed-off-by: Paulo Zanoni Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 5 ++++ drivers/gpu/drm/i915/intel_dp.c | 57 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index e347055..f55e889 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7093,6 +7093,7 @@ enum { #define GEN11_TC3_HOTPLUG (1 << 18) #define GEN11_TC2_HOTPLUG (1 << 17) #define GEN11_TC1_HOTPLUG (1 << 16) +#define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16)) #define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC4_HOTPLUG | \ GEN11_TC3_HOTPLUG | \ GEN11_TC2_HOTPLUG | \ @@ -7101,6 +7102,7 @@ enum { #define GEN11_TBT3_HOTPLUG (1 << 2) #define GEN11_TBT2_HOTPLUG (1 << 1) #define GEN11_TBT1_HOTPLUG (1 << 0) +#define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port)) #define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT4_HOTPLUG | \ GEN11_TBT3_HOTPLUG | \ GEN11_TBT2_HOTPLUG | \ @@ -7525,6 +7527,9 @@ enum { #define SDE_GMBUS_ICP (1 << 23) #define SDE_DDIB_HOTPLUG_ICP (1 << 17) #define SDE_DDIA_HOTPLUG_ICP (1 << 16) +#define SDE_TC_HOTPLUG_ICP(tc_port) (1 << ((tc_port) + 24)) +#define SDE_DDI_HOTPLUG_ICP(port) (1 << ((port) + 16)) + #define SDE_DDI_MASK_ICP (SDE_DDIB_HOTPLUG_ICP | \ SDE_DDIA_HOTPLUG_ICP) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6ac6c87..cc6c190 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4750,6 +4750,61 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder) return I915_READ(GEN8_DE_PORT_ISR) & bit; } +static bool icl_combo_port_connected(struct drm_i915_private *dev_priv, + struct intel_digital_port *intel_dig_port) +{ + enum port port = intel_dig_port->base.port; + + return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(port); +} + +static bool icl_tc_port_connected(struct drm_i915_private *dev_priv, + struct intel_digital_port *intel_dig_port) +{ + enum port port = intel_dig_port->base.port; + enum tc_port tc_port = intel_port_to_tc(dev_priv, port); + u32 legacy_bit = ICP_TC_HOTPLUG(tc_port); + u32 typec_bit = GEN11_TC_HOTPLUG(tc_port); + u32 tbt_bit = GEN11_TBT_HOTPLUG(tc_port); + bool is_legacy = false, is_typec = false, is_tbt = false; + u32 cpu_isr; + + if (I915_READ(SDEISR) & legacy_bit) + is_legacy = true; + + cpu_isr = I915_READ(GEN11_DE_HPD_ISR); + if (cpu_isr & typec_bit) + is_typec = true; + if (cpu_isr & tbt_bit) + is_tbt = true; + + WARN_ON(is_legacy + is_typec + is_tbt > 1); + if (!is_legacy && !is_typec && !is_tbt) + return false; + + return true; +} + +static bool icl_digital_port_connected(struct intel_encoder *encoder) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); + + switch (encoder->hpd_pin) { + case HPD_PORT_A: + case HPD_PORT_B: + return icl_combo_port_connected(dev_priv, dig_port); + case HPD_PORT_C: + case HPD_PORT_D: + case HPD_PORT_E: + case HPD_PORT_F: + return icl_tc_port_connected(dev_priv, dig_port); + default: + MISSING_CASE(encoder->hpd_pin); + return false; + } +} + /* * intel_digital_port_connected - is the specified port connected? * @encoder: intel_encoder @@ -4777,6 +4832,8 @@ bool intel_digital_port_connected(struct intel_encoder *encoder) return bdw_digital_port_connected(encoder); else if (IS_GEN9_LP(dev_priv)) return bxt_digital_port_connected(encoder); + else if (IS_ICELAKE(dev_priv)) + return icl_digital_port_connected(encoder); else return spt_digital_port_connected(encoder); }