diff mbox

[v3] drm/i915/glk: Add Quirk for GLK NUC HDMI port issues.

Message ID 1530209670-27678-1-git-send-email-clinton.a.taylor@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Clint Taylor June 28, 2018, 6:14 p.m. UTC
From: Clint Taylor <clinton.a.taylor@intel.com>

On GLK NUC platforms the HDMI retiming buffer needs additional disabled
time to correctly sync to a faster incoming signal.

When measured on a scope the highspeed lines of the HDMI clock turn off
 for ~400uS during a normal resolution change. The HDMI retimer on the
 GLK NUC appears to require at least a full frame of quiet time before a
new faster clock can be correctly sync'd. Wait 100ms due to msleep
inaccuracies while waiting for a completed frame. Add a quirk to the
driver for GLK boards that use ITE66317 HDMI retimers.

V2: Add more devices to the quirk list
V3: Delay increased to 100ms, check to confirm crtc type is HDMI.

Cc: Imre Deak <imre.deak@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105887
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++++++++++--
 drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++++-
 drivers/gpu/drm/i915/intel_drv.h     |  3 +--
 4 files changed, 36 insertions(+), 5 deletions(-)

Comments

Imre Deak June 29, 2018, 9:09 a.m. UTC | #1
On Thu, Jun 28, 2018 at 11:14:30AM -0700, clinton.a.taylor@intel.com wrote:
> From: Clint Taylor <clinton.a.taylor@intel.com>
> 
> On GLK NUC platforms the HDMI retiming buffer needs additional disabled
> time to correctly sync to a faster incoming signal.
> 
> When measured on a scope the highspeed lines of the HDMI clock turn off
>  for ~400uS during a normal resolution change. The HDMI retimer on the
>  GLK NUC appears to require at least a full frame of quiet time before a
> new faster clock can be correctly sync'd. Wait 100ms due to msleep
> inaccuracies while waiting for a completed frame. Add a quirk to the
> driver for GLK boards that use ITE66317 HDMI retimers.
> 
> V2: Add more devices to the quirk list
> V3: Delay increased to 100ms, check to confirm crtc type is HDMI.
> 
> Cc: Imre Deak <imre.deak@intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105887
> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |  1 +
>  drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++++++++++--
>  drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++++-
>  drivers/gpu/drm/i915/intel_drv.h     |  3 +--
>  4 files changed, 36 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2b684f4..6c5a679 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -655,6 +655,7 @@ enum intel_sbi_destination {
>  #define QUIRK_BACKLIGHT_PRESENT (1<<3)
>  #define QUIRK_PIN_SWIZZLED_PAGES (1<<5)
>  #define QUIRK_INCREASE_T12_DELAY (1<<6)
> +#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
>  
>  struct intel_fbdev;
>  struct intel_fbc_work;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 0319825..89bb5ce 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1807,15 +1807,27 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
>  	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
>  }
>  
> -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
> -				       enum transcoder cpu_transcoder)
> +/* Quirk time at 100ms for reliable operation */
> +#define DDI_DISABLED_QUIRK_TIME 100
> +
> +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
>  {
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +

Extra w/s.

>  	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
>  	uint32_t val = I915_READ(reg);
>  
>  	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
>  	val |= TRANS_DDI_PORT_NONE;
>  	I915_WRITE(reg, val);
> +
> +	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> +	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> +		msleep(DDI_DISABLED_QUIRK_TIME);
> +		DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n");
> +	}

I still think the macro is redundant, but I'd put here your comment
about the worst case mode and delay. The debug print should come before
the wait.

>  }
>  
>  int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eaa0663..ff42268 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5837,7 +5837,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
>  		intel_ddi_set_vc_payload_alloc(old_crtc_state, false);
>  
>  	if (!transcoder_is_dsi(cpu_transcoder))
> -		intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
> +		intel_ddi_disable_transcoder_func(old_crtc_state);
>  
>  	if (INTEL_GEN(dev_priv) >= 9)
>  		skylake_scaler_disable(intel_crtc);
> @@ -14852,6 +14852,17 @@ static void quirk_increase_t12_delay(struct drm_device *dev)
>  	DRM_INFO("Applying T12 delay quirk\n");
>  }
>  
> +/* GeminiLake NUC HDMI outputs require additional off time
> + * this allows the onboard retimer to correctly sync to signal
> + */
> +static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(dev);
> +
> +	dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
> +	DRM_INFO("Applying Increase DDI Disabled quirk\n");
> +}
> +
>  struct intel_quirk {
>  	int device;
>  	int subsystem_vendor;
> @@ -14938,6 +14949,14 @@ static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)
>  
>  	/* Toshiba Satellite P50-C-18C */
>  	{ 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay },
> +
> +	/* GeminiLake NUC */
> +	{ 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
> +	{ 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
> +	/* ASRock ITX*/
> +	{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
> +	{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
> +

Extra w/s.

With the above fixed:
Reviewed-by: Imre Deak <imre.deak@intel.com>

>  };
>  
>  static void intel_init_quirks(struct drm_device *dev)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index a6ff260..9c3a3d6 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1384,8 +1384,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc,
>  void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
>  bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
>  void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
> -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
> -				       enum transcoder cpu_transcoder);
> +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
>  void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
>  void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
>  void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);
> -- 
> 1.9.1
>
Clint Taylor July 3, 2018, 8:26 p.m. UTC | #2
On 06/29/2018 02:09 AM, Imre Deak wrote:
> On Thu, Jun 28, 2018 at 11:14:30AM -0700, clinton.a.taylor@intel.com wrote:
>> From: Clint Taylor <clinton.a.taylor@intel.com>
>>
>> On GLK NUC platforms the HDMI retiming buffer needs additional disabled
>> time to correctly sync to a faster incoming signal.
>>
>> When measured on a scope the highspeed lines of the HDMI clock turn off
>>   for ~400uS during a normal resolution change. The HDMI retimer on the
>>   GLK NUC appears to require at least a full frame of quiet time before a
>> new faster clock can be correctly sync'd. Wait 100ms due to msleep
>> inaccuracies while waiting for a completed frame. Add a quirk to the
>> driver for GLK boards that use ITE66317 HDMI retimers.
>>
>> V2: Add more devices to the quirk list
>> V3: Delay increased to 100ms, check to confirm crtc type is HDMI.
>>
>> Cc: Imre Deak <imre.deak@intel.com>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105887
>> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h      |  1 +
>>   drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++++++++++--
>>   drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++++++-
>>   drivers/gpu/drm/i915/intel_drv.h     |  3 +--
>>   4 files changed, 36 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 2b684f4..6c5a679 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -655,6 +655,7 @@ enum intel_sbi_destination {
>>   #define QUIRK_BACKLIGHT_PRESENT (1<<3)
>>   #define QUIRK_PIN_SWIZZLED_PAGES (1<<5)
>>   #define QUIRK_INCREASE_T12_DELAY (1<<6)
>> +#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
>>   
>>   struct intel_fbdev;
>>   struct intel_fbc_work;
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index 0319825..89bb5ce 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -1807,15 +1807,27 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
>>   	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
>>   }
>>   
>> -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
>> -				       enum transcoder cpu_transcoder)
>> +/* Quirk time at 100ms for reliable operation */
>> +#define DDI_DISABLED_QUIRK_TIME 100
>> +
>> +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
>>   {
>> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>> +	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
>> +
> Extra w/s.
>
>>   	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
>>   	uint32_t val = I915_READ(reg);
>>   
>>   	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
>>   	val |= TRANS_DDI_PORT_NONE;
>>   	I915_WRITE(reg, val);
>> +
>> +	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
>> +	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
>> +		msleep(DDI_DISABLED_QUIRK_TIME);
>> +		DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n");
>> +	}
> I still think the macro is redundant, but I'd put here your comment
> about the worst case mode and delay. The debug print should come before
> the wait.
>
>>   }
>>   
>>   int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index eaa0663..ff42268 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -5837,7 +5837,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
>>   		intel_ddi_set_vc_payload_alloc(old_crtc_state, false);
>>   
>>   	if (!transcoder_is_dsi(cpu_transcoder))
>> -		intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
>> +		intel_ddi_disable_transcoder_func(old_crtc_state);
>>   
>>   	if (INTEL_GEN(dev_priv) >= 9)
>>   		skylake_scaler_disable(intel_crtc);
>> @@ -14852,6 +14852,17 @@ static void quirk_increase_t12_delay(struct drm_device *dev)
>>   	DRM_INFO("Applying T12 delay quirk\n");
>>   }
>>   
>> +/* GeminiLake NUC HDMI outputs require additional off time
>> + * this allows the onboard retimer to correctly sync to signal
>> + */
>> +static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
>> +{
>> +	struct drm_i915_private *dev_priv = to_i915(dev);
>> +
>> +	dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
>> +	DRM_INFO("Applying Increase DDI Disabled quirk\n");
>> +}
>> +
>>   struct intel_quirk {
>>   	int device;
>>   	int subsystem_vendor;
>> @@ -14938,6 +14949,14 @@ static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)
>>   
>>   	/* Toshiba Satellite P50-C-18C */
>>   	{ 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay },
>> +
>> +	/* GeminiLake NUC */
>> +	{ 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
>> +	{ 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
>> +	/* ASRock ITX*/
>> +	{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
>> +	{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
>> +
> Extra w/s.
>
> With the above fixed:
> Reviewed-by: Imre Deak <imre.deak@intel.com>

Can't accept the R-B yet as the patch failed testing. Added another 
conditional check for INTEL_OUTPUT_DDI as some devices return this 
output type during a cold boot.

Submitted v4 with the changes.

-Clint

>
>>   };
>>   
>>   static void intel_init_quirks(struct drm_device *dev)
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>> index a6ff260..9c3a3d6 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -1384,8 +1384,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc,
>>   void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
>>   bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
>>   void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
>> -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
>> -				       enum transcoder cpu_transcoder);
>> +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
>>   void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
>>   void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
>>   void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);
>> -- 
>> 1.9.1
>>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2b684f4..6c5a679 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -655,6 +655,7 @@  enum intel_sbi_destination {
 #define QUIRK_BACKLIGHT_PRESENT (1<<3)
 #define QUIRK_PIN_SWIZZLED_PAGES (1<<5)
 #define QUIRK_INCREASE_T12_DELAY (1<<6)
+#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
 
 struct intel_fbdev;
 struct intel_fbc_work;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0319825..89bb5ce 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1807,15 +1807,27 @@  void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
 }
 
-void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
-				       enum transcoder cpu_transcoder)
+/* Quirk time at 100ms for reliable operation */
+#define DDI_DISABLED_QUIRK_TIME 100
+
+void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
 {
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
 	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
 	uint32_t val = I915_READ(reg);
 
 	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
 	val |= TRANS_DDI_PORT_NONE;
 	I915_WRITE(reg, val);
+
+	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
+	    intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
+		msleep(DDI_DISABLED_QUIRK_TIME);
+		DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n");
+	}
 }
 
 int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index eaa0663..ff42268 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5837,7 +5837,7 @@  static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state,
 		intel_ddi_set_vc_payload_alloc(old_crtc_state, false);
 
 	if (!transcoder_is_dsi(cpu_transcoder))
-		intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
+		intel_ddi_disable_transcoder_func(old_crtc_state);
 
 	if (INTEL_GEN(dev_priv) >= 9)
 		skylake_scaler_disable(intel_crtc);
@@ -14852,6 +14852,17 @@  static void quirk_increase_t12_delay(struct drm_device *dev)
 	DRM_INFO("Applying T12 delay quirk\n");
 }
 
+/* GeminiLake NUC HDMI outputs require additional off time
+ * this allows the onboard retimer to correctly sync to signal
+ */
+static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
+	dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME;
+	DRM_INFO("Applying Increase DDI Disabled quirk\n");
+}
+
 struct intel_quirk {
 	int device;
 	int subsystem_vendor;
@@ -14938,6 +14949,14 @@  static int intel_dmi_reverse_brightness(const struct dmi_system_id *id)
 
 	/* Toshiba Satellite P50-C-18C */
 	{ 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay },
+
+	/* GeminiLake NUC */
+	{ 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
+	{ 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
+	/* ASRock ITX*/
+	{ 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
+	{ 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
+
 };
 
 static void intel_init_quirks(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a6ff260..9c3a3d6 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1384,8 +1384,7 @@  void hsw_fdi_link_train(struct intel_crtc *crtc,
 void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
 void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
-void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
-				       enum transcoder cpu_transcoder);
+void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
 void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
 void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
 void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);