From patchwork Sat Jul 14 03:14:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 10524385 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7C1EB601C2 for ; Sat, 14 Jul 2018 03:17:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6BA31298DD for ; Sat, 14 Jul 2018 03:17:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F20F298E4; Sat, 14 Jul 2018 03:17:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F2923298DD for ; Sat, 14 Jul 2018 03:17:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B40016F42E; Sat, 14 Jul 2018 03:15:58 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id A04566F42E; Sat, 14 Jul 2018 03:15:57 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jul 2018 20:15:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,350,1526367600"; d="scan'208";a="245169134" Received: from mint-dev.iind.intel.com ([10.223.25.164]) by fmsmga005.fm.intel.com with ESMTP; 13 Jul 2018 20:15:54 -0700 From: Ramalingam C To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, daniel@ffwll.ch, seanpaul@chromium.org, tomas.winkler@intel.com, alexander.usyskin@intel.com, uma.shankar@intel.com Date: Sat, 14 Jul 2018 08:44:59 +0530 Message-Id: <1531538117-1606-18-git-send-email-ramalingam.c@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1531538117-1606-1-git-send-email-ramalingam.c@intel.com> References: <1531538117-1606-1-git-send-email-ramalingam.c@intel.com> Subject: [Intel-gfx] [PATCH v6 17/35] drm/i915: Check HDCP 1.4 and 2.2 link on CP_IRQ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP On DP HDCP1.4 and 2.2, when CP_IRQ is received, start the link integrity check for the HDCP version that is enabled. v2: Rebased. Function name is changed. v3: No Changes. v4: No Changes. v5: No Changes. v6: %s/_in_force/_in_use [Sean Paul] Signed-off-by: Ramalingam C cc: Sean Paul Reviewed-by: Sean Paul Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/gpu/drm/i915/intel_hdcp.c | 31 ++++++++++++++++++++++++++++++- 3 files changed, 32 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0d31c9c286e9..6dcb09430fb5 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4484,7 +4484,7 @@ intel_dp_short_pulse(struct intel_dp *intel_dp) if (sink_irq_vector & DP_AUTOMATED_TEST_REQUEST) intel_dp_handle_test_request(intel_dp); if (sink_irq_vector & DP_CP_IRQ) - intel_hdcp_check_link(intel_dp->attached_connector); + intel_hdcp_handle_cp_irq(intel_dp->attached_connector); if (sink_irq_vector & DP_SINK_SPECIFIC_IRQ) DRM_DEBUG_DRIVER("Sink specific irq unhandled\n"); } diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index ce4679a0b530..82cda9a5aae3 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1969,10 +1969,10 @@ int intel_hdcp_init(struct intel_connector *connector, bool hdcp2_supported); int intel_hdcp_enable(struct intel_connector *connector); int intel_hdcp_disable(struct intel_connector *connector); -int intel_hdcp_check_link(struct intel_connector *connector); bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port); int intel_hdcp_component_init(struct drm_i915_private *dev_priv); bool is_hdcp2_supported(struct drm_i915_private *dev_priv); +void intel_hdcp_handle_cp_irq(struct intel_connector *connector); /* intel_psr.c */ #define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c index 6afce9ae09ed..66d47240336f 100644 --- a/drivers/gpu/drm/i915/intel_hdcp.c +++ b/drivers/gpu/drm/i915/intel_hdcp.c @@ -32,6 +32,7 @@ int intel_hdcp_read_valid_bksv(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim, u8 *bksv); static struct intel_digital_port *conn_to_dig_port(struct intel_connector *connector); +static int intel_hdcp_check_link(struct intel_connector *connector); /* Is HDCP1.4 capable on Platform and Panel */ static bool intel_hdcp_capable(struct intel_connector *connector) @@ -66,6 +67,26 @@ static bool intel_hdcp2_capable(struct intel_connector *connector) return capable; } +static inline bool intel_hdcp_in_use(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum port port = connector->encoder->port; + u32 reg; + + reg = I915_READ(PORT_HDCP_STATUS(port)); + return reg & (HDCP_STATUS_AUTH | HDCP_STATUS_ENC); +} + +static inline bool intel_hdcp2_in_use(struct intel_connector *connector) +{ + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + enum port port = connector->encoder->port; + u32 reg; + + reg = I915_READ(HDCP2_STATUS_DDI(port)); + return reg & (LINK_ENCRYPTION_STATUS | LINK_AUTH_STATUS); +} + static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port, const struct intel_hdcp_shim *shim) { @@ -928,7 +949,7 @@ void intel_hdcp_atomic_check(struct drm_connector *connector, } /* Implements Part 3 of the HDCP authorization procedure */ -int intel_hdcp_check_link(struct intel_connector *connector) +static int intel_hdcp_check_link(struct intel_connector *connector) { struct intel_hdcp *hdcp = &connector->hdcp; struct drm_i915_private *dev_priv = connector->base.dev->dev_private; @@ -1821,3 +1842,11 @@ static void intel_hdcp2_check_work(struct work_struct *work) schedule_delayed_work(&hdcp->hdcp2_check_work, DRM_HDCP2_CHECK_PERIOD_MS); } + +void intel_hdcp_handle_cp_irq(struct intel_connector *connector) +{ + if (intel_hdcp_in_use(connector)) + intel_hdcp_check_link(connector); + else if (intel_hdcp2_in_use(connector)) + intel_hdcp2_check_link(connector); +}