diff mbox series

[1/2] drm/i915/icl: Add TBT checks for PLL calculations

Message ID 1532554138-3551-1-git-send-email-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/i915/icl: Add TBT checks for PLL calculations | expand

Commit Message

Srivatsa, Anusha July 25, 2018, 9:28 p.m. UTC
Add missing TBT check in the Pll calculation.

v2: do not use a auxiliary function to check if status is
TBT or not. (Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Zanoni, Paulo R July 25, 2018, 10:41 p.m. UTC | #1
Em Qua, 2018-07-25 às 14:28 -0700, Anusha Srivatsa escreveu:
> Add missing TBT check in the Pll calculation.
> 
> v2: do not use a auxiliary function to check if status is
> TBT or not. (Paulo)
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 7e5e6eb..ba49078 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -428,6 +428,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct
> intel_crtc_state *crtc_state,
>  	     struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> +
>  	struct intel_shared_dpll *pll;
>  	enum intel_dpll_id i;
>  

This chunk does nothing and the space introduced is even against our
coding style. Please review your own patches before submitting them to
the mailing list: this is the kind of error that's very easy to catch
by looking at the patch file, saving everybody's time.



> @@ -2866,6 +2867,9 @@ static struct intel_shared_dpll *
>  icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state
> *crtc_state,
>  	     struct intel_encoder *encoder)
>  {
> +	struct intel_digital_port *intel_dig_port =
> +			enc_to_dig_port(&encoder->base);
> +

This chunk also adds a blank line that goes against our coding style.



>  	struct intel_shared_dpll *pll;
>  	struct intel_dpll_hw_state pll_state = {};
>  	enum port port = encoder->port;
> @@ -2885,7 +2889,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct
> intel_crtc_state *crtc_state,
>  	case PORT_D:
>  	case PORT_E:
>  	case PORT_F:
> -		if (0 /* TODO: TBT PLLs */) {
> +		if (intel_dig_port->tc_type == TC_PORT_TBT) {
>  			min = DPLL_ID_ICL_TBTPLL;
>  			max = min;
>  			ret = icl_calc_dpll_state(crtc_state,
> encoder, clock,
Srivatsa, Anusha July 26, 2018, 11:18 p.m. UTC | #2
>-----Original Message-----
>From: Zanoni, Paulo R
>Sent: Wednesday, July 25, 2018 3:41 PM
>To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>gfx@lists.freedesktop.org
>Cc: De Marchi, Lucas <lucas.demarchi@intel.com>
>Subject: Re: [PATCH 1/2] drm/i915/icl: Add TBT checks for PLL calculations
>
>Em Qua, 2018-07-25 às 14:28 -0700, Anusha Srivatsa escreveu:
>> Add missing TBT check in the Pll calculation.
>>
>> v2: do not use a auxiliary function to check if status is TBT or not.
>> (Paulo)
>>
>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++++-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> index 7e5e6eb..ba49078 100644
>> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
>> @@ -428,6 +428,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct
>> intel_crtc_state *crtc_state,
>>  	     struct intel_encoder *encoder)
>>  {
>>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>> +
>>  	struct intel_shared_dpll *pll;
>>  	enum intel_dpll_id i;
>>
>
>This chunk does nothing and the space introduced is even against our coding
>style. Please review your own patches before submitting them to the mailing list:
>this is the kind of error that's very easy to catch by looking at the patch file,
>saving everybody's time.
>
Oops :(
Agreed. 
>
>> @@ -2866,6 +2867,9 @@ static struct intel_shared_dpll *
>> icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state
>> *crtc_state,
>>  	     struct intel_encoder *encoder)
>>  {
>> +	struct intel_digital_port *intel_dig_port =
>> +			enc_to_dig_port(&encoder->base);
>> +
>
>This chunk also adds a blank line that goes against our coding style.
>
Will take care!
Thanks,
Anusha
>
>>  	struct intel_shared_dpll *pll;
>>  	struct intel_dpll_hw_state pll_state = {};
>>  	enum port port = encoder->port;
>> @@ -2885,7 +2889,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct
>> intel_crtc_state *crtc_state,
>>  	case PORT_D:
>>  	case PORT_E:
>>  	case PORT_F:
>> -		if (0 /* TODO: TBT PLLs */) {
>> +		if (intel_dig_port->tc_type == TC_PORT_TBT) {
>>  			min = DPLL_ID_ICL_TBTPLL;
>>  			max = min;
>>  			ret = icl_calc_dpll_state(crtc_state, encoder, clock,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 7e5e6eb..ba49078 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -428,6 +428,7 @@  ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	     struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+
 	struct intel_shared_dpll *pll;
 	enum intel_dpll_id i;
 
@@ -2866,6 +2867,9 @@  static struct intel_shared_dpll *
 icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	     struct intel_encoder *encoder)
 {
+	struct intel_digital_port *intel_dig_port =
+			enc_to_dig_port(&encoder->base);
+
 	struct intel_shared_dpll *pll;
 	struct intel_dpll_hw_state pll_state = {};
 	enum port port = encoder->port;
@@ -2885,7 +2889,7 @@  icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	case PORT_D:
 	case PORT_E:
 	case PORT_F:
-		if (0 /* TODO: TBT PLLs */) {
+		if (intel_dig_port->tc_type == TC_PORT_TBT) {
 			min = DPLL_ID_ICL_TBTPLL;
 			max = min;
 			ret = icl_calc_dpll_state(crtc_state, encoder, clock,