diff mbox series

firmware/dmc/icl: load v1.07 on icelake.

Message ID 1532995031-2469-2-git-send-email-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show
Series firmware/dmc/icl: load v1.07 on icelake. | expand

Commit Message

Srivatsa, Anusha July 30, 2018, 11:57 p.m. UTC
Add Support to load DMC on Icelake.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_csr.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Imre Deak July 31, 2018, 12:56 p.m. UTC | #1
On Mon, Jul 30, 2018 at 04:57:11PM -0700, Anusha Srivatsa wrote:
> Add Support to load DMC on Icelake.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_csr.c | 7 +++++++
>  1 file changed, 7 insertions(+)

the firmware also needs to be loaded during runtime/system resume, by adding
the following to icl_display_core_init(), similarly to other platforms:

	if (resume && dev_priv->csr.dmc_payload)
		intel_csr_load_program(dev_priv);

> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index cf9b600..393d419 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -34,6 +34,9 @@
>   * low-power state and comes back to normal.
>   */
>  
> +#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin"
> +#define ICL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 7)
> +
>  #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
>  MODULE_FIRMWARE(I915_CSR_GLK);
>  #define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
> @@ -301,6 +304,8 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
>  	if (csr->fw_path == i915_modparams.dmc_firmware_path) {
>  		/* Bypass version check for firmware override. */
>  		required_version = csr->version;
> +	} else if (IS_ICELAKE(dev_priv)) {
> +		required_version = ICL_CSR_VERSION_REQUIRED;
>  	} else if (IS_CANNONLAKE(dev_priv)) {
>  		required_version = CNL_CSR_VERSION_REQUIRED;
>  	} else if (IS_GEMINILAKE(dev_priv)) {
> @@ -458,6 +463,8 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
>  
>  	if (i915_modparams.dmc_firmware_path)
>  		csr->fw_path = i915_modparams.dmc_firmware_path;
> +	else if (IS_ICELAKE(dev_priv))
> +		csr->fw_path = I915_CSR_ICL;
>  	else if (IS_CANNONLAKE(dev_priv))
>  		csr->fw_path = I915_CSR_CNL;
>  	else if (IS_GEMINILAKE(dev_priv))
> -- 
> 2.7.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index cf9b600..393d419 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -34,6 +34,9 @@ 
  * low-power state and comes back to normal.
  */
 
+#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin"
+#define ICL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 7)
+
 #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
 MODULE_FIRMWARE(I915_CSR_GLK);
 #define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
@@ -301,6 +304,8 @@  static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
 	if (csr->fw_path == i915_modparams.dmc_firmware_path) {
 		/* Bypass version check for firmware override. */
 		required_version = csr->version;
+	} else if (IS_ICELAKE(dev_priv)) {
+		required_version = ICL_CSR_VERSION_REQUIRED;
 	} else if (IS_CANNONLAKE(dev_priv)) {
 		required_version = CNL_CSR_VERSION_REQUIRED;
 	} else if (IS_GEMINILAKE(dev_priv)) {
@@ -458,6 +463,8 @@  void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 
 	if (i915_modparams.dmc_firmware_path)
 		csr->fw_path = i915_modparams.dmc_firmware_path;
+	else if (IS_ICELAKE(dev_priv))
+		csr->fw_path = I915_CSR_ICL;
 	else if (IS_CANNONLAKE(dev_priv))
 		csr->fw_path = I915_CSR_CNL;
 	else if (IS_GEMINILAKE(dev_priv))