| Message ID | 1533003183-22793-14-git-send-email-manasi.d.navare@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Display Stream Compression on eDP/DP | expand |
>-----Original Message----- >From: Navare, Manasi D >Sent: Monday, July 30, 2018 7:13 PM >To: intel-gfx@lists.freedesktop.org >Cc: ville.syrjala@linux.intel.com; jani.nikula@linux.intel.com; Srivatsa, Anusha ><anusha.srivatsa@intel.com>; Singh, Gaurav K <gaurav.k.singh@intel.com>; >Navare, Manasi D <manasi.d.navare@intel.com>; Vivi, Rodrigo ><rodrigo.vivi@intel.com>; Nikula, Jani <jani.nikula@intel.com> >Subject: [PATCH 13/23] drm/i915/dp: Do not enable PSR2 if DSC is enabled > >If a eDP panel supports both PSR2 and VDSC, our HW cannot support both at a >time. Give priority to PSR2 if a requested resolution can be supported without >compression else enable VDSC and keep PSR2 disabled. Nit: Commit message uses VDSC and the comment below says DSC. >Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >Cc: Jani Nikula <jani.nikula@intel.com> >Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> But the check is proper, ofc. Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >--- > drivers/gpu/drm/i915/intel_psr.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > >diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c >index 4bd5768..fdb028f 100644 >--- a/drivers/gpu/drm/i915/intel_psr.c >+++ b/drivers/gpu/drm/i915/intel_psr.c >@@ -441,6 +441,16 @@ static bool intel_psr2_config_valid(struct intel_dp >*intel_dp, > if (!dev_priv->psr.sink_psr2_support) > return false; > >+ /* >+ * DSC and PSR2 cannot be enabled simultaneously. If a requested >+ * resolution requires DSC to be enabled, priority is given to DSC >+ * over PSR2. >+ */ >+ if (crtc_state->dsc_params.compression_enable) { >+ DRM_DEBUG_KMS("PSR2 cannot be enabled since DSC is >enabled\n"); >+ return false; >+ } >+ > if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { > psr_max_h = 4096; > psr_max_v = 2304; >-- >2.7.4
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 4bd5768..fdb028f 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -441,6 +441,16 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, if (!dev_priv->psr.sink_psr2_support) return false; + /* + * DSC and PSR2 cannot be enabled simultaneously. If a requested + * resolution requires DSC to be enabled, priority is given to DSC + * over PSR2. + */ + if (crtc_state->dsc_params.compression_enable) { + DRM_DEBUG_KMS("PSR2 cannot be enabled since DSC is enabled\n"); + return false; + } + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { psr_max_h = 4096; psr_max_v = 2304;
If a eDP panel supports both PSR2 and VDSC, our HW cannot support both at a time. Give priority to PSR2 if a requested resolution can be supported without compression else enable VDSC and keep PSR2 disabled. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> --- drivers/gpu/drm/i915/intel_psr.c | 10 ++++++++++ 1 file changed, 10 insertions(+)