| Message ID | 1533003183-22793-18-git-send-email-manasi.d.navare@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Enable Display Stream Compression on eDP/DP | expand |
>-----Original Message----- >From: Navare, Manasi D >Sent: Monday, July 30, 2018 7:13 PM >To: intel-gfx@lists.freedesktop.org >Cc: ville.syrjala@linux.intel.com; jani.nikula@linux.intel.com; Srivatsa, Anusha ><anusha.srivatsa@intel.com>; Singh, Gaurav K <gaurav.k.singh@intel.com>; >Navare, Manasi D <manasi.d.navare@intel.com> >Subject: [PATCH 17/23] drm/i915/dp: Enable/Disable DSC in DP Sink > >From: Gaurav K Singh <gaurav.k.singh@intel.com> > >This patch enables decompression support in sink device before link training and >disables the same during the DDI disabling. > >v2:(From Manasi) >* Change the enable/disable function to take crtc_state instead of intel_dp as an >argument (Manasi) >* Use the compression_enable flag as part of crtc_state (Manasi) > >Cc: Jani Nikula <jani.nikula@linux.intel.com> >Cc: Ville Syrjala <ville.syrjala@linux.intel.com> >Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> >Cc: Gaurav K Singh <gaurav.k.singh@intel.com> >Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com> >Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> Looks good. Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >--- > drivers/gpu/drm/i915/intel_ddi.c | 5 +++++ drivers/gpu/drm/i915/intel_dp.c | >15 +++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 +++ > 3 files changed, 23 insertions(+) > >diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c >index 0adc043..5e8c891 100644 >--- a/drivers/gpu/drm/i915/intel_ddi.c >+++ b/drivers/gpu/drm/i915/intel_ddi.c >@@ -2825,6 +2825,8 @@ static void intel_ddi_pre_enable_dp(struct >intel_encoder *encoder, > intel_ddi_init_dp_buf_reg(encoder); > if (!is_mst) > intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); >+ intel_dp_sink_set_decompression_state(intel_dp, crtc_state, >+ DP_DECOMPRESSION_EN); > intel_dp_start_link_train(intel_dp); > if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) > intel_dp_stop_link_train(intel_dp); >@@ -3154,6 +3156,9 @@ static void intel_disable_ddi_dp(struct intel_encoder >*encoder, > intel_edp_drrs_disable(intel_dp, old_crtc_state); > intel_psr_disable(intel_dp, old_crtc_state); > intel_edp_backlight_off(old_conn_state); >+ /* Disable the decompression in DP Sink */ >+ intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, >+ ~DP_DECOMPRESSION_EN); > } > > static void intel_disable_ddi_hdmi(struct intel_encoder *encoder, diff --git >a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index >d7fc50f..436cbfb 100644 >--- a/drivers/gpu/drm/i915/intel_dp.c >+++ b/drivers/gpu/drm/i915/intel_dp.c >@@ -2925,6 +2925,21 @@ static bool downstream_hpd_needs_d0(struct >intel_dp *intel_dp) > intel_dp->downstream_ports[0] & DP_DS_PORT_HPD; } > >+void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, >+ const struct intel_crtc_state >*crtc_state, >+ int state) >+{ >+ int ret; >+ >+ if (!crtc_state->dsc_params.compression_enable) >+ return; >+ >+ ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE, state); >+ if (ret < 0) >+ DRM_DEBUG_KMS("Failed to %s sink decompression state\n", >+ state == DP_DECOMPRESSION_EN ? "enable" : >"disable"); } >+ > /* If the sink supports it, try to set the power state appropriately */ void >intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) { diff --git >a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h >index 01ab23d..85b6a37 100644 >--- a/drivers/gpu/drm/i915/intel_drv.h >+++ b/drivers/gpu/drm/i915/intel_drv.h >@@ -1691,6 +1691,9 @@ void intel_dp_stop_link_train(struct intel_dp >*intel_dp); int intel_dp_retrain_link(struct intel_encoder *encoder, > struct drm_modeset_acquire_ctx *ctx); void >intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); >+void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, >+ const struct intel_crtc_state >*crtc_state, >+ int state); > void intel_dp_encoder_reset(struct drm_encoder *encoder); void >intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); void >intel_dp_encoder_destroy(struct drm_encoder *encoder); >-- >2.7.4
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 0adc043..5e8c891 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2825,6 +2825,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_ddi_init_dp_buf_reg(encoder); if (!is_mst) intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); + intel_dp_sink_set_decompression_state(intel_dp, crtc_state, + DP_DECOMPRESSION_EN); intel_dp_start_link_train(intel_dp); if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp); @@ -3154,6 +3156,9 @@ static void intel_disable_ddi_dp(struct intel_encoder *encoder, intel_edp_drrs_disable(intel_dp, old_crtc_state); intel_psr_disable(intel_dp, old_crtc_state); intel_edp_backlight_off(old_conn_state); + /* Disable the decompression in DP Sink */ + intel_dp_sink_set_decompression_state(intel_dp, old_crtc_state, + ~DP_DECOMPRESSION_EN); } static void intel_disable_ddi_hdmi(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d7fc50f..436cbfb 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2925,6 +2925,21 @@ static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp) intel_dp->downstream_ports[0] & DP_DS_PORT_HPD; } +void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int state) +{ + int ret; + + if (!crtc_state->dsc_params.compression_enable) + return; + + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE, state); + if (ret < 0) + DRM_DEBUG_KMS("Failed to %s sink decompression state\n", + state == DP_DECOMPRESSION_EN ? "enable" : "disable"); +} + /* If the sink supports it, try to set the power state appropriately */ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 01ab23d..85b6a37 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1691,6 +1691,9 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp); int intel_dp_retrain_link(struct intel_encoder *encoder, struct drm_modeset_acquire_ctx *ctx); void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); +void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int state); void intel_dp_encoder_reset(struct drm_encoder *encoder); void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); void intel_dp_encoder_destroy(struct drm_encoder *encoder);