From patchwork Tue Aug 7 23:05:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 10559327 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 049F315A6 for ; Tue, 7 Aug 2018 23:10:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E834529F7F for ; Tue, 7 Aug 2018 23:10:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DCEFD29F8C; Tue, 7 Aug 2018 23:10:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9078729F7F for ; Tue, 7 Aug 2018 23:10:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E9BEC6E47A; Tue, 7 Aug 2018 23:10:06 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id A75AD6E46D for ; Tue, 7 Aug 2018 23:10:04 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 07 Aug 2018 16:10:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,456,1526367600"; d="scan'208";a="64335760" Received: from anusha-dev.jf.intel.com ([10.7.198.63]) by orsmga006.jf.intel.com with ESMTP; 07 Aug 2018 16:10:04 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Aug 2018 16:05:30 -0700 Message-Id: <1533683132-21625-4-git-send-email-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533683132-21625-1-git-send-email-anusha.srivatsa@intel.com> References: <1533683132-21625-1-git-send-email-anusha.srivatsa@intel.com> Subject: [Intel-gfx] [PATCH 3/5] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: "Srivatsa, Anusha" If the panel supports FEC, the driver has to set the FEC_READY bit in the dpcd register: FEC_CONFIGURATION. This has to happen before link training. v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready - change commit message. (Gaurav) Cc: Gaurav K Singh Cc: Jani Nikula Cc: Ville Syrjala Cc: Manasi Navare Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/intel_ddi.c | 1 + drivers/gpu/drm/i915/intel_dp.c | 17 +++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 +++ 3 files changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 5e8c891..9cdcc31 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2827,6 +2827,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); intel_dp_sink_set_decompression_state(intel_dp, crtc_state, DP_DECOMPRESSION_EN); + intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY); intel_dp_start_link_train(intel_dp); if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index cb8b63e..5ef9005 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -2948,6 +2948,23 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, state == DP_DECOMPRESSION_EN ? "enable" : "disable"); } +void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int state) +{ + int ret; + + if (!crtc_state->dsc_params.compression_enable) + return; + + if (intel_dp_is_edp(intel_dp)) + return; + + ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state); + if (ret < 0) + DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n"); +} + /* If the sink supports it, try to set the power state appropriately */ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) { diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 0ecfacf..1ab9b20 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1696,6 +1696,9 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state, int state); +void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state, + int state); void intel_dp_encoder_reset(struct drm_encoder *encoder); void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); void intel_dp_encoder_destroy(struct drm_encoder *encoder);