From patchwork Wed Aug 8 12:15:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chauhan, Madhav" X-Patchwork-Id: 10559897 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1145290E3 for ; Wed, 8 Aug 2018 12:26:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F17BD2AAA7 for ; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5BBA2AAB7; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A4FA62AAA7 for ; Wed, 8 Aug 2018 12:26:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 05DB06E554; Wed, 8 Aug 2018 12:26:27 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2E6656E543 for ; Wed, 8 Aug 2018 12:26:23 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Aug 2018 05:26:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,457,1526367600"; d="scan'208";a="63520858" Received: from madhav-desktop.iind.intel.com ([10.223.25.13]) by orsmga008.jf.intel.com with ESMTP; 08 Aug 2018 05:26:10 -0700 From: Madhav Chauhan To: intel-gfx@lists.freedesktop.org Date: Wed, 8 Aug 2018 17:45:55 +0530 Message-Id: <1533730559-461-9-git-send-email-madhav.chauhan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> References: <1533730559-461-1-git-send-email-madhav.chauhan@intel.com> Subject: [Intel-gfx] [PATCH 08/12] drm/i915/icl: Enable/disable TE interrupts X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, vandita.kulkarni@intel.com, rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP If DSI is operating in command mode, then display engine won't be receiving VBLANK interrupt instead of that Tearing Event(TE) interrupt will be received. So in this scenario, we need to enable/disable TE interrupt rather than VBLANK interrupts. Signed-off-by: Madhav Chauhan --- drivers/gpu/drm/i915/i915_irq.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5dadefc..a24c670 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3398,10 +3398,18 @@ static int ironlake_enable_vblank(struct drm_device *dev, unsigned int pipe) static int gen8_enable_vblank(struct drm_device *dev, unsigned int pipe) { struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_encoder *encoder; unsigned long irqflags; spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + encoder = gen11_dsi_find_cmd_mode_encoder(crtc); + + if (IS_ICELAKE(dev_priv) && encoder) + gen11_dsi_configure_te_interrupt(encoder, true); + else + bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); /* Even if there is no DMC, frame counter can get stuck when @@ -3452,10 +3460,18 @@ static void ironlake_disable_vblank(struct drm_device *dev, unsigned int pipe) static void gen8_disable_vblank(struct drm_device *dev, unsigned int pipe) { struct drm_i915_private *dev_priv = to_i915(dev); + struct intel_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; + struct intel_encoder *encoder; unsigned long irqflags; spin_lock_irqsave(&dev_priv->irq_lock, irqflags); - bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + encoder = gen11_dsi_find_cmd_mode_encoder(crtc); + + if (IS_ICELAKE(dev_priv) && encoder) + gen11_dsi_configure_te_interrupt(encoder, false); + else + bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK); + spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); }