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[v2] drm/i915/psr: Add PSR mode/revision to debugfs

Message ID 1533852418-168379-1-git-send-email-azhar.shaikh@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/psr: Add PSR mode/revision to debugfs | expand

Commit Message

Azhar Shaikh Aug. 9, 2018, 10:06 p.m. UTC 
Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file
i915_edp_psr_status.

Suggested-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
Changes in v2:
- Fix checkpatch warning.
- Add Reviewed-by: from v1

 drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index f9ce35da4123..a0dc603387eb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2708,6 +2708,8 @@  static int i915_edp_psr_status(struct seq_file *m, void *data)
 	intel_runtime_pm_get(dev_priv);
 
 	mutex_lock(&dev_priv->psr.lock);
+	seq_printf(m, "PSR mode: %s\n",
+		   dev_priv->psr.psr2_enabled ? "PSR2" : "PSR1");
 	seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled));
 	seq_printf(m, "Busy frontbuffer bits: 0x%03x\n",
 		   dev_priv->psr.busy_frontbuffer_bits);