| Message ID | 1535632874-29927-4-git-send-email-juhapekka.heikkila@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm: Add P010, P012, P016 format definitions and fourcc | expand |
Hey, I like the new series. Looks good to me. Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Unfortunately, we probably shouldn't merge this until we've fixed IGT to support the new floating point formats. :( This requires a new pixman release and a new cairo release, but without it we can't actually test. Op 30-08-18 om 14:41 schreef Juha-Pekka Heikkila: > Enabling of P010, P012 and P016 formats. These formats will > extend NV12 for larger bit depths. > > (Sharma, Swati2) Rename glk format table to follow similar style as on skl. > > Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> > --- > drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++++++++++- > drivers/gpu/drm/i915/intel_sprite.c | 26 ++++++++++++++++++++++++-- > 2 files changed, 47 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 43efeb4..1a67340 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -104,6 +104,25 @@ static const uint32_t skl_pri_planar_formats[] = { > DRM_FORMAT_NV12, > }; > > +static const uint32_t glk_pri_planar_formats[] = { > + DRM_FORMAT_C8, > + DRM_FORMAT_RGB565, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_XRGB2101010, > + DRM_FORMAT_XBGR2101010, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > + DRM_FORMAT_P010, > + DRM_FORMAT_P012, > + DRM_FORMAT_P016, > +}; > + > static const uint64_t skl_format_modifiers_noccs[] = { > I915_FORMAT_MOD_Yf_TILED, > I915_FORMAT_MOD_Y_TILED, > @@ -13721,7 +13740,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) > primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, > PLANE_PRIMARY); > > - if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { > + intel_primary_formats = glk_pri_planar_formats; > + num_formats = ARRAY_SIZE(glk_pri_planar_formats); > + } else if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { > intel_primary_formats = skl_pri_planar_formats; > num_formats = ARRAY_SIZE(skl_pri_planar_formats); > } else { > diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c > index 1f1276f..3270fab 100644 > --- a/drivers/gpu/drm/i915/intel_sprite.c > +++ b/drivers/gpu/drm/i915/intel_sprite.c > @@ -1294,6 +1294,22 @@ static uint32_t skl_planar_formats[] = { > DRM_FORMAT_NV12, > }; > > +static uint32_t glk_planar_formats[] = { > + DRM_FORMAT_RGB565, > + DRM_FORMAT_ABGR8888, > + DRM_FORMAT_ARGB8888, > + DRM_FORMAT_XBGR8888, > + DRM_FORMAT_XRGB8888, > + DRM_FORMAT_YUYV, > + DRM_FORMAT_YVYU, > + DRM_FORMAT_UYVY, > + DRM_FORMAT_VYUY, > + DRM_FORMAT_NV12, > + DRM_FORMAT_P010, > + DRM_FORMAT_P012, > + DRM_FORMAT_P016, > +}; > + > static const uint64_t skl_plane_format_modifiers_noccs[] = { > I915_FORMAT_MOD_Yf_TILED, > I915_FORMAT_MOD_Y_TILED, > @@ -1551,8 +1567,14 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, > > if (skl_plane_has_planar(dev_priv, pipe, > PLANE_SPRITE0 + plane)) { > - plane_formats = skl_planar_formats; > - num_plane_formats = ARRAY_SIZE(skl_planar_formats); > + if (INTEL_GEN(dev_priv) >= 10 || > + IS_GEMINILAKE(dev_priv)) { > + plane_formats = glk_planar_formats; > + num_plane_formats = ARRAY_SIZE(glk_planar_formats); > + } else { > + plane_formats = skl_planar_formats; > + num_plane_formats = ARRAY_SIZE(skl_planar_formats); > + } > } else { > plane_formats = skl_plane_formats; > num_plane_formats = ARRAY_SIZE(skl_plane_formats);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 43efeb4..1a67340 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -104,6 +104,25 @@ static const uint32_t skl_pri_planar_formats[] = { DRM_FORMAT_NV12, }; +static const uint32_t glk_pri_planar_formats[] = { + DRM_FORMAT_C8, + DRM_FORMAT_RGB565, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XRGB2101010, + DRM_FORMAT_XBGR2101010, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, + DRM_FORMAT_P010, + DRM_FORMAT_P012, + DRM_FORMAT_P016, +}; + static const uint64_t skl_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -13721,7 +13740,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe) primary->has_ccs = skl_plane_has_ccs(dev_priv, pipe, PLANE_PRIMARY); - if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) { + intel_primary_formats = glk_pri_planar_formats; + num_formats = ARRAY_SIZE(glk_pri_planar_formats); + } else if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) { intel_primary_formats = skl_pri_planar_formats; num_formats = ARRAY_SIZE(skl_pri_planar_formats); } else { diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 1f1276f..3270fab 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -1294,6 +1294,22 @@ static uint32_t skl_planar_formats[] = { DRM_FORMAT_NV12, }; +static uint32_t glk_planar_formats[] = { + DRM_FORMAT_RGB565, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + DRM_FORMAT_NV12, + DRM_FORMAT_P010, + DRM_FORMAT_P012, + DRM_FORMAT_P016, +}; + static const uint64_t skl_plane_format_modifiers_noccs[] = { I915_FORMAT_MOD_Yf_TILED, I915_FORMAT_MOD_Y_TILED, @@ -1551,8 +1567,14 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, if (skl_plane_has_planar(dev_priv, pipe, PLANE_SPRITE0 + plane)) { - plane_formats = skl_planar_formats; - num_plane_formats = ARRAY_SIZE(skl_planar_formats); + if (INTEL_GEN(dev_priv) >= 10 || + IS_GEMINILAKE(dev_priv)) { + plane_formats = glk_planar_formats; + num_plane_formats = ARRAY_SIZE(glk_planar_formats); + } else { + plane_formats = skl_planar_formats; + num_plane_formats = ARRAY_SIZE(skl_planar_formats); + } } else { plane_formats = skl_plane_formats; num_plane_formats = ARRAY_SIZE(skl_plane_formats);
Enabling of P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. (Sharma, Swati2) Rename glk format table to follow similar style as on skl. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> --- drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++++++++++++++- drivers/gpu/drm/i915/intel_sprite.c | 26 ++++++++++++++++++++++++-- 2 files changed, 47 insertions(+), 3 deletions(-)