From patchwork Wed Sep 5 09:02:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthik B S X-Patchwork-Id: 10588529 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 014A013BB for ; Wed, 5 Sep 2018 09:13:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA61929A2B for ; Wed, 5 Sep 2018 09:13:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DE38629AE1; Wed, 5 Sep 2018 09:13:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9631D29A2B for ; Wed, 5 Sep 2018 09:13:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6FD966E07B; Wed, 5 Sep 2018 09:13:38 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 38A7E6E07B for ; Wed, 5 Sep 2018 09:13:37 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Sep 2018 02:13:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,333,1531810800"; d="scan'208";a="87333028" Received: from genxfsim-12.iind.intel.com ([10.223.25.19]) by fmsmga001.fm.intel.com with ESMTP; 05 Sep 2018 02:13:35 -0700 From: Karthik B S To: intel-gfx@lists.freedesktop.org Date: Wed, 5 Sep 2018 14:32:38 +0530 Message-Id: <1536138159-10842-1-git-send-email-karthik.b.s@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915/icl: Avoid Gen10 watermark workarounds in Gen11 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rodrigo.vivi@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Display Workarounds #1125 and #1126 are intended for Gen10 and below platforms. These workarounds can be avoided in Gen11. The result blocks for WM1-WM7 should be atleast as high as the level below the current level(Part of Display WA #1125). This part is applicable even for Gen11, so it is taken out of the condition check. v2: Improved Commit Message and addresed other review comments(Rodrigo). Signed-off-by: Karthik B S Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_pm.c | 37 +++++++++++++++++++++---------------- 1 file changed, 21 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d99e5fa..b5db6a3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4677,26 +4677,31 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, res_lines = div_round_up_fixed16(selected_result, wp->plane_blocks_per_line); - /* Display WA #1125: skl,bxt,kbl,glk */ - if (level == 0 && wp->rc_surface) - res_blocks += fixed16_to_u32_round_up(wp->y_tile_minimum); - - /* Display WA #1126: skl,bxt,kbl,glk */ - if (level >= 1 && level <= 7) { - if (wp->y_tiled) { + if (INTEL_GEN(dev_priv) < 11) { + /* Display WA #1125: skl,bxt,kbl,glk */ + if (level == 0 && wp->rc_surface) res_blocks += fixed16_to_u32_round_up( wp->y_tile_minimum); - res_lines += wp->y_min_scanlines; - } else { - res_blocks++; + + /* Display WA #1126: skl,bxt,kbl,glk */ + if (level >= 1 && level <= 7) { + if (wp->y_tiled) { + res_blocks += fixed16_to_u32_round_up + (wp->y_tile_minimum); + res_lines += wp->y_min_scanlines; + } else { + res_blocks++; + } } + } - /* - * Make sure result blocks for higher latency levels are atleast - * as high as level below the current level. - * Assumption in DDB algorithm optimization for special cases. - * Also covers Display WA #1125 for RC. - */ + /* + * Make sure result blocks for higher latency levels are atleast + * as high as level below the current level. + * Assumption in DDB algorithm optimization for special cases. + * Also covers Display WA #1125 for RC. + */ + if (level >= 1 && level <= 7) { if (result_prev->plane_res_b > res_blocks) res_blocks = result_prev->plane_res_b; }