From patchwork Tue Nov 27 09:39:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kulkarni, Vandita" X-Patchwork-Id: 10699979 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0BD9413BF for ; Tue, 27 Nov 2018 09:55:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF49B2A495 for ; Tue, 27 Nov 2018 09:55:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E3EDA2A4CA; Tue, 27 Nov 2018 09:55:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7F8E12A642 for ; Tue, 27 Nov 2018 09:55:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8EFCA6E0D4; Tue, 27 Nov 2018 09:55:40 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id E04E26E0D2 for ; Tue, 27 Nov 2018 09:55:35 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Nov 2018 01:55:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,286,1539673200"; d="scan'208";a="100837798" Received: from vandita-desktop.iind.intel.com ([10.223.25.24]) by FMSMGA003.fm.intel.com with ESMTP; 27 Nov 2018 01:55:33 -0800 From: Vandita Kulkarni To: intel-gfx@lists.freedesktop.org Date: Tue, 27 Nov 2018 15:09:05 +0530 Message-Id: <1543311548-19149-4-git-send-email-vandita.kulkarni@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1543311548-19149-1-git-send-email-vandita.kulkarni@intel.com> References: <1543311548-19149-1-git-send-email-vandita.kulkarni@intel.com> Subject: [Intel-gfx] [PATCH 3/6] drm/i915/icl: Get port clock from pll. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com, ville.syrjala@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Use the same method to get port clock like other encoders. Signed-off-by: Vandita Kulkarni --- drivers/gpu/drm/i915/icl_dsi.c | 10 ++++++++-- drivers/gpu/drm/i915/intel_ddi.c | 2 +- drivers/gpu/drm/i915/intel_dsi.h | 4 ++++ 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 8590825..ec22b2e 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -1105,12 +1105,18 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, { struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi, base); + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + int link_clock = 0; + uint32_t pll_id; u32 pixel_clk; - //FIXME: Calculate pixel clock using PLL functions once implemented. + pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll); + link_clock = cnl_calc_wrpll_link(dev_priv, pll_id); + pipe_config->port_clock = link_clock; + pixel_clk = intel_dsi->pclk; pipe_config->base.adjusted_mode.crtc_clock = pixel_clk; - pipe_config->port_clock = pixel_clk; + pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); } static bool gen11_dsi_compute_config(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index ad11540..3783f79 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1363,7 +1363,7 @@ static int skl_calc_wrpll_link(struct drm_i915_private *dev_priv, return dco_freq / (p0 * p1 * p2 * 5); } -static int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, +int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, enum intel_dpll_id pll_id) { uint32_t cfgcr0, cfgcr1; diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index ee93137..80805bf 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -189,4 +189,8 @@ void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi, enum mipi_seq seq_id); void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec); +/* icl dsi uses combophy pll which can be used by any ddi */ +int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, + enum intel_dpll_id pll_id); + #endif /* _INTEL_DSI_H */