From patchwork Wed Jan 16 16:21:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10766303 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 30E5A1390 for ; Wed, 16 Jan 2019 15:58:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 218372EDE8 for ; Wed, 16 Jan 2019 15:58:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 15B2C2ED6D; Wed, 16 Jan 2019 15:58:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B5A022ED6D for ; Wed, 16 Jan 2019 15:58:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 301F16F114; Wed, 16 Jan 2019 15:58:41 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 45C4F6F114 for ; Wed, 16 Jan 2019 15:58:38 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jan 2019 07:58:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,486,1539673200"; d="scan'208";a="267598332" Received: from linuxpresi1-desktop.iind.intel.com ([10.223.25.28]) by orsmga004.jf.intel.com with ESMTP; 16 Jan 2019 07:58:36 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Wed, 16 Jan 2019 21:51:32 +0530 Message-Id: <1547655697-4092-2-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1547655697-4092-1-git-send-email-uma.shankar@intel.com> References: <1547655697-4092-1-git-send-email-uma.shankar@intel.com> Subject: [Intel-gfx] [v6 1/6] drm/i915: Sanitize crtc gamma and csc mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Sanitize crtc gamma and csc mode and update the mode in driver in case BIOS has setup a different mode or gamma luts, csc with any other unexpected values than desired. There is restriction on HSW platform not to read/write color LUT's if ips is enabled. Handled the same accordingly. We don't read out the LUT's and CTM that the BIOS setup, so at the moment they stick around for a while until they get unexpectedly clobbered by a subsequent modeset or fastset. The change here will basically force them to be reset to standard/linear values at startup. Maybe in the future we'll try to actually read out and preserve the contents of the actual LUT's and CTM that the BIOS had setup, but we don't do that yet today, so the change here at least makes the behavior a little bit more consistent than what it has been. v2: Addressed Matt's review comments. Credits-to: Matt Roper Signed-off-by: Uma Shankar Reviewed-by: Matt Roper --- drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index af164d7..56fa469 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15434,6 +15434,27 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc, } } + /* + * Sanitize gamma mode incase BIOS leaves it in SPLIT GAMMA MODE + * or gamma luts, csc with any other unexpected values than desired. + * We don't read out the LUT's and CTM that the BIOS setup, so at the + * moment they stick around for a while until they get unexpectedly + * clobbered by a subsequent modeset or fastset. + * The change here will basically force them to be reset to + * standard/linear values at startup. + * Workaround HSW : Do not read or write the pipe palette/gamma data + * while GAMMA_MODE is configured for split gamma and IPS_CTL has IPS + * enabled. + */ + if (IS_HASWELL(dev_priv)) { + hsw_disable_ips(crtc_state); + + intel_color_set_csc(crtc_state); + intel_color_load_luts(crtc_state); + + hsw_enable_ips(crtc_state); + } + /* Adjust the state of the output pipe according to whether we * have active connectors/encoders. */ if (crtc_state->base.active && !intel_crtc_has_encoders(crtc))