From patchwork Fri Mar 29 13:32:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolin Zhang X-Patchwork-Id: 10876361 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 422271708 for ; Fri, 29 Mar 2019 04:01:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C6F129060 for ; Fri, 29 Mar 2019 04:01:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2110629065; Fri, 29 Mar 2019 04:01:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=2.0 tests=BAYES_00,DATE_IN_FUTURE_06_12, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 224002909A for ; Fri, 29 Mar 2019 04:01:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AA8966E820; Fri, 29 Mar 2019 04:01:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F03C6E822; Fri, 29 Mar 2019 04:01:25 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Mar 2019 21:01:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,283,1549958400"; d="scan'208";a="129648588" Received: from vca-bj120.bj.intel.com ([10.240.192.119]) by orsmga008.jf.intel.com with ESMTP; 28 Mar 2019 21:01:23 -0700 From: Xiaolin Zhang To: intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Fri, 29 Mar 2019 09:32:44 -0400 Message-Id: <1553866364-111114-9-git-send-email-xiaolin.zhang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1553866364-111114-1-git-send-email-xiaolin.zhang@intel.com> References: <1553866364-111114-1-git-send-email-xiaolin.zhang@intel.com> Subject: [Intel-gfx] [PATCH v4 8/8] drm/i915/gvt: GVTg support context submission pv optimization X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhenyu.z.wang@intel.com, hang.yuan@intel.com, zhiyuan.lv@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP implemented context submission pv optimizaiton within GVTg. GVTg to read context submission data (elsp_data) from the shared_page directly without trap cost and eliminate execlist HW behavior emulation without injecting context switch interrupt to guest under PV submisison mechanism. v0: RFC v1: rebase v2: rebase v3: report pv context submission cap and handle VGT_G2V_ELSP_SUBMIT g2v pv notification. v4: eliminate execlist HW emulation and don't inject context switch interrupt to guest under PV submisison mechanism. Signed-off-by: Xiaolin Zhang --- drivers/gpu/drm/i915/gvt/execlist.c | 6 ++++++ drivers/gpu/drm/i915/gvt/handlers.c | 32 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/gvt/vgpu.c | 1 + 3 files changed, 39 insertions(+) diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c index 1a93472..e68f1d4b 100644 --- a/drivers/gpu/drm/i915/gvt/execlist.c +++ b/drivers/gpu/drm/i915/gvt/execlist.c @@ -382,6 +382,9 @@ static int prepare_execlist_workload(struct intel_vgpu_workload *workload) int ring_id = workload->ring_id; int ret; + if (VGPU_PVCAP(vgpu, PV_SUBMISSION)) + return 0; + if (!workload->emulate_schedule_in) return 0; @@ -429,6 +432,9 @@ static int complete_execlist_workload(struct intel_vgpu_workload *workload) goto out; } + if (VGPU_PVCAP(vgpu, PV_SUBMISSION)) + goto out; + ret = emulate_execlist_ctx_schedule_out(execlist, &workload->ctx_desc); out: intel_vgpu_unpin_mm(workload->shadow_mm); diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 2b4c686..cbba77c 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1182,6 +1182,35 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, return 0; } +static int intel_vgpu_g2v_pv_elsp_submit(struct intel_vgpu *vgpu) +{ + struct intel_vgpu_execlist *execlist; + u32 ring_id_off; + int ring_id; + u32 descs_off; + + int ret = -EINVAL; + + if (!VGPU_PVCAP(vgpu, PV_SUBMISSION)) + return ret; + + ring_id_off = offsetof(struct gvt_shared_page, ring_id); + if (intel_gvt_read_shared_page(vgpu, ring_id_off, &ring_id, 4)) + return ret; + + if (WARN_ON(ring_id < 0 || ring_id >= I915_NUM_ENGINES)) + return ret; + + execlist = &vgpu->submission.execlist[ring_id]; + + descs_off = offsetof(struct gvt_shared_page, descs); + if (intel_gvt_read_shared_page(vgpu, descs_off, + &execlist->elsp_dwords.data, 8 * EXECLIST_MAX_PORTS)) + return ret; + + return intel_vgpu_submit_execlist(vgpu, ring_id); +} + static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) { intel_gvt_gtt_type_t root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY; @@ -1221,6 +1250,9 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) case VGT_G2V_PPGTT_L4_CLEAR: ret = intel_vgpu_g2v_pv_ppgtt_clear_4lvl(vgpu, pdps); break; + case VGT_G2V_PV_SUBMISSION: + ret = intel_vgpu_g2v_pv_elsp_submit(vgpu); + break; case VGT_G2V_EXECLIST_CONTEXT_CREATE: case VGT_G2V_EXECLIST_CONTEXT_DESTROY: case 1: /* Remove this in guest driver. */ diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index bc7387e..c71aaf6 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -51,6 +51,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) if (!intel_vtd_active()) vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) = PV_PPGTT_UPDATE; + vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) |= PV_SUBMISSION; vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) = vgpu_aperture_gmadr_base(vgpu);