| Message ID | 1554365187-30575-4-git-send-email-vandita.kulkarni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Fix mipi dsi pipe_config mismatch for icl | expand |
On Thu, 04 Apr 2019, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: > In case of dual link mode, the mode clock that we get > from the VBT is halved. > > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > --- > drivers/gpu/drm/i915/icl_dsi.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c > index 69cd6b2..c77960f 100644 > --- a/drivers/gpu/drm/i915/icl_dsi.c > +++ b/drivers/gpu/drm/i915/icl_dsi.c > @@ -1255,11 +1255,18 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, > { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); > + int crtc_clock; > > /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ > pipe_config->port_clock = > cnl_calc_wrpll_link(dev_priv, &pipe_config->dpll_hw_state); > - pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk; > + > + if (intel_dsi->dual_link) > + crtc_clock = intel_dsi->pclk * 2; > + else > + crtc_clock = intel_dsi->pclk; > + > + pipe_config->base.adjusted_mode.crtc_clock = crtc_clock; I'd do this with simply: if (intel_dsi->dual_link) pipe_config->base.adjusted_mode.crtc_clock *= 2; BR, Jani. > gen11_dsi_get_timings(encoder, pipe_config); > pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); > pipe_config->pipe_bpp = mipi_dsi_pixel_format_to_bpp
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c index 69cd6b2..c77960f 100644 --- a/drivers/gpu/drm/i915/icl_dsi.c +++ b/drivers/gpu/drm/i915/icl_dsi.c @@ -1255,11 +1255,18 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); + int crtc_clock; /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ pipe_config->port_clock = cnl_calc_wrpll_link(dev_priv, &pipe_config->dpll_hw_state); - pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk; + + if (intel_dsi->dual_link) + crtc_clock = intel_dsi->pclk * 2; + else + crtc_clock = intel_dsi->pclk; + + pipe_config->base.adjusted_mode.crtc_clock = crtc_clock; gen11_dsi_get_timings(encoder, pipe_config); pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); pipe_config->pipe_bpp = mipi_dsi_pixel_format_to_bpp
In case of dual link mode, the mode clock that we get from the VBT is halved. Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> --- drivers/gpu/drm/i915/icl_dsi.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)