From patchwork Wed May 8 18:38:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 10936371 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B02FE924 for ; Wed, 8 May 2019 18:12:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A5865289BC for ; Wed, 8 May 2019 18:12:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A11A289D4; Wed, 8 May 2019 18:12:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4FD15289BC for ; Wed, 8 May 2019 18:12:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C0F5089916; Wed, 8 May 2019 18:12:42 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF04889916; Wed, 8 May 2019 18:12:41 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 May 2019 11:12:41 -0700 X-ExtLoop1: 1 Received: from linuxpresi1-desktop.iind.intel.com ([10.223.74.121]) by orsmga006.jf.intel.com with ESMTP; 08 May 2019 11:12:37 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Thu, 9 May 2019 00:08:50 +0530 Message-Id: <1557340733-9629-11-git-send-email-uma.shankar@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1557340733-9629-1-git-send-email-uma.shankar@intel.com> References: <1557340733-9629-1-git-send-email-uma.shankar@intel.com> Subject: [Intel-gfx] [v9 10/13] drm/i915: Set Infoframe for non modeset case for HDR X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dcastagna@chromium.org, jonas@kwiboo.se, seanpaul@chromium.org, ville.syrjala@intel.com, maarten.lankhorst@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP HDR metadata requires a infoframe to be set. Due to fastset, full modeset is not performed hence adding it to update_pipe to handle that. Signed-off-by: Uma Shankar Reviewed-by: Shashank Sharma --- drivers/gpu/drm/i915/intel_ddi.c | 13 +++++++++++++ drivers/gpu/drm/i915/intel_hdmi.c | 7 +++++-- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index cd5277d..d37526b 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -3559,6 +3559,10 @@ static void intel_ddi_update_pipe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, const struct drm_connector_state *conn_state) { + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + struct intel_digital_port *intel_dig_port = + enc_to_dig_port(&encoder->base); + if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) intel_ddi_update_pipe_dp(encoder, crtc_state, conn_state); @@ -3568,6 +3572,15 @@ static void intel_ddi_update_pipe(struct intel_encoder *encoder, else if (conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_UNDESIRED) intel_hdcp_disable(to_intel_connector(conn_state->connector)); + + /* Set the infoframe for NON modeset cases as well */ + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) { + if ((INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) && + conn_state->hdr_metadata_changed) + intel_dig_port->set_infoframes(encoder, + crtc_state->has_infoframe, + crtc_state, conn_state); + } } static void intel_ddi_set_fia_lane_count(struct intel_encoder *encoder, diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index db9c82b..e559a940 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1204,8 +1204,11 @@ static void hsw_set_infoframes(struct intel_encoder *encoder, i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); u32 val = I915_READ(reg); - assert_hdmi_transcoder_func_disabled(dev_priv, - crtc_state->cpu_transcoder); + /* DRM Infoframe can be send with transcoder enabled */ + if (!((INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) && + conn_state->hdr_metadata_changed)) + assert_hdmi_transcoder_func_disabled(dev_priv, + crtc_state->cpu_transcoder); val &= ~(VIDEO_DIP_ENABLE_VSC_HSW | VIDEO_DIP_ENABLE_AVI_HSW | VIDEO_DIP_ENABLE_GCP_HSW | VIDEO_DIP_ENABLE_VS_HSW |