diff mbox series

drm/i915: FBC needs vblank before enable / disable

Message ID 1559109487-29542-1-git-send-email-kiran.s.kumar@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: FBC needs vblank before enable / disable | expand

Commit Message

kirankumar May 29, 2019, 5:58 a.m. UTC
From: Kiran Kumar S <kiran.s.kumar@intel.corp-partner.google.com>

As per the display workaround #1200, FBC needs wait for vblank
before enabling and before disabling FBC.

In some cases, depending on whether FBC was compressing in that frame,
several control signals in the compression engine also will fail to
properly recognize the final segment of the frame as a result of the
missing last pixel indication. As a result of this, we're seeing corrupted
cache line/compression indicators after FBC re-enables which causes
underruns or corruption when they're used to decompress.

WA sequence as below:
1) Display enables plane 1A
2) Wait for 1 vblank
3) FBC gets enabled
4) Wait for 1 VBLANK
5) Turn off FBC

In GLK Chrome OS, if FBC is enabled by default, few top lines on the screen
got corrupted. With the above WA, issue was resolved.

v2: Added wait for vblank code in FBC as it will be called if and only if
fbc is enabled.

And also, as per the information from hardware team that the above
WA is for GLK.

Signed-off-by: Kiran Kumar S <kiran.s.kumar@intel.corp-partner.google.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 5679f2fffb7c..d4b8cfb8419e 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -1094,6 +1094,8 @@  void intel_fbc_enable(struct intel_crtc *crtc,
 		if (fbc->crtc == crtc) {
 			WARN_ON(!crtc_state->enable_fbc);
 			WARN_ON(fbc->active);
+			if (IS_GEMINILAKE(dev_priv))
+				intel_wait_for_vblank(dev_priv, crtc->pipe);
 		}
 		goto out;
 	}
@@ -1134,8 +1136,11 @@  void intel_fbc_disable(struct intel_crtc *crtc)
 		return;
 
 	mutex_lock(&fbc->lock);
-	if (fbc->crtc == crtc)
+	if (fbc->crtc == crtc) {
 		__intel_fbc_disable(dev_priv);
+		if (IS_GEMINILAKE(dev_priv))
+			intel_wait_for_vblank(dev_priv, crtc->pipe);
+	}
 	mutex_unlock(&fbc->lock);
 }