Message ID | 1567153913-20166-3-git-send-email-swati2.sharma@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915: adding state checker for gamma lut values | expand |
On Fri, 30 Aug 2019, Swati Sharma <swati2.sharma@intel.com> wrote: > Add debug log for color related parameters like gamma_mode, gamma_enable, > csc_enable, etc inside intel_dump_pipe_config(). > > v6: -Added debug log for color para in intel_dump_pipe_config [Jani] > v7: -Split patch 3 into 4 patches > v8: -Corrected alignment [Uma] > > Signed-off-by: Swati Sharma <swati2.sharma@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index ea2915d..f9c0842 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -12138,6 +12138,15 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, > > intel_dpll_dump_hw_state(dev_priv, &pipe_config->dpll_hw_state); > > + if (IS_CHERRYVIEW(dev_priv)) > + DRM_DEBUG_KMS("cgm_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n", > + pipe_config->cgm_mode, pipe_config->gamma_mode, > + pipe_config->gamma_enable, pipe_config->csc_enable); > + else > + DRM_DEBUG_KMS("csc_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n", > + pipe_config->csc_mode, pipe_config->gamma_mode, > + pipe_config->gamma_enable, pipe_config->csc_enable); > + > dump_planes: > if (!state) > return;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ea2915d..f9c0842 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -12138,6 +12138,15 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config, intel_dpll_dump_hw_state(dev_priv, &pipe_config->dpll_hw_state); + if (IS_CHERRYVIEW(dev_priv)) + DRM_DEBUG_KMS("cgm_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n", + pipe_config->cgm_mode, pipe_config->gamma_mode, + pipe_config->gamma_enable, pipe_config->csc_enable); + else + DRM_DEBUG_KMS("csc_mode: 0x%x gamma_mode: 0x%x gamma_enable: %d csc_enable: %d\n", + pipe_config->csc_mode, pipe_config->gamma_mode, + pipe_config->gamma_enable, pipe_config->csc_enable); + dump_planes: if (!state) return;
Add debug log for color related parameters like gamma_mode, gamma_enable, csc_enable, etc inside intel_dump_pipe_config(). v6: -Added debug log for color para in intel_dump_pipe_config [Jani] v7: -Split patch 3 into 4 patches v8: -Corrected alignment [Uma] Signed-off-by: Swati Sharma <swati2.sharma@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++++ 1 file changed, 9 insertions(+)