From patchwork Tue Sep 17 05:48:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiaolin Zhang X-Patchwork-Id: 11148073 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE65976 for ; Tue, 17 Sep 2019 05:49:08 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B6A9B21670 for ; Tue, 17 Sep 2019 05:49:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B6A9B21670 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4ADD06E127; Tue, 17 Sep 2019 05:49:08 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 981E46E127; Tue, 17 Sep 2019 05:49:06 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Sep 2019 22:49:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,515,1559545200"; d="scan'208";a="386441292" Received: from xzhan34-mobl3.bj.intel.com ([10.238.154.70]) by fmsmga005.fm.intel.com with ESMTP; 16 Sep 2019 22:49:04 -0700 From: Xiaolin Zhang To: intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Date: Tue, 17 Sep 2019 13:48:18 +0800 Message-Id: <1568699301-2799-8-git-send-email-xiaolin.zhang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1568699301-2799-1-git-send-email-xiaolin.zhang@intel.com> References: <1568699301-2799-1-git-send-email-xiaolin.zhang@intel.com> Subject: [Intel-gfx] [PATCH v10 7/9] drm/i915/gvt: GVTg handle shared_page setup X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: zhenyu.z.wang@intel.com, hang.yuan@intel.com, zhiyuan.lv@intel.com MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" GVTg implemented shared_page setup operation and read_shared_page functionality based on hypervisor_read_gpa(). the shared_page_gpa was passed from guest driver through PVINFO shared_page_gpa register. v0: RFC. v1: rebase. v2: rebase. v3: added shared_page_gpa check and if read_gpa failure, return zero memory and handle VGT_G2V_SHARED_PAGE_SETUP g2v notification v4: rebase. v5: rebase. v6: rebase, added PV version support. v7: rebase. Signed-off-by: Xiaolin Zhang --- drivers/gpu/drm/i915/gvt/gvt.h | 8 ++++++- drivers/gpu/drm/i915/gvt/handlers.c | 20 +++++++++++++++++ drivers/gpu/drm/i915/gvt/vgpu.c | 43 +++++++++++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index b47c6ac..71213e0 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -49,6 +49,7 @@ #include "fb_decoder.h" #include "dmabuf.h" #include "page_track.h" +#include "i915_vgpu.h" #define GVT_MAX_VGPU 8 @@ -229,6 +230,8 @@ struct intel_vgpu { struct completion vblank_done; u32 scan_nonprivbb; + u64 shared_page_gpa; + bool shared_page_enabled; }; /* validating GM healthy status*/ @@ -690,7 +693,10 @@ static inline void intel_gvt_mmio_set_in_ctx( void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu); void intel_gvt_debugfs_init(struct intel_gvt *gvt); void intel_gvt_debugfs_clean(struct intel_gvt *gvt); - +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len); +int intel_gvt_write_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len); #include "trace.h" #include "mpt.h" diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index aceb16f..eb09003 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -1195,6 +1195,8 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, case 0x78010: /* vgt_caps */ case 0x7881c: case _vgtif_reg(pv_caps): + case _vgtif_reg(shared_page_gpa): + case _vgtif_reg(shared_page_gpa) + 4: break; default: invalid_read = true; @@ -1212,6 +1214,9 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) enum intel_gvt_gtt_type root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY; struct intel_vgpu_mm *mm; u64 *pdps; + unsigned long gpa, gfn; + u16 ver_major = PV_MAJOR; + u16 ver_minor = PV_MINOR; pdps = (u64 *)&vgpu_vreg64_t(vgpu, vgtif_reg(pdp[0])); @@ -1225,6 +1230,19 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) case VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY: case VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY: return intel_vgpu_put_ppgtt_mm(vgpu, pdps); + case VGT_G2V_SHARED_PAGE_SETUP: + gpa = vgpu_vreg64_t(vgpu, vgtif_reg(shared_page_gpa)); + gfn = gpa >> PAGE_SHIFT; + if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) { + vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) = 0; + return 0; + } + vgpu->shared_page_gpa = gpa; + vgpu->shared_page_enabled = true; + + intel_gvt_write_shared_page(vgpu, 0, &ver_major, 2); + intel_gvt_write_shared_page(vgpu, 2, &ver_minor, 2); + break; case VGT_G2V_EXECLIST_CONTEXT_CREATE: case VGT_G2V_EXECLIST_CONTEXT_DESTROY: case 1: /* Remove this in guest driver. */ @@ -1281,6 +1299,8 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, case _vgtif_reg(pdp[3].hi): case _vgtif_reg(execlist_context_descriptor_lo): case _vgtif_reg(execlist_context_descriptor_hi): + case _vgtif_reg(shared_page_gpa): + case _vgtif_reg(shared_page_gpa) + 4: break; case _vgtif_reg(rsv5[0])..._vgtif_reg(rsv5[3]): invalid_write = true; diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 9e00979..811edbb 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -63,6 +63,8 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX; vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX; + vgpu_vreg64_t(vgpu, vgtif_reg(shared_page_gpa)) = 0; + gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id); gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n", vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu)); @@ -591,3 +593,44 @@ void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu) intel_gvt_reset_vgpu_locked(vgpu, true, 0); mutex_unlock(&vgpu->vgpu_lock); } + +/** + * intel_gvt_read_shared_page - read content from shared page + */ +int intel_gvt_read_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len) +{ + int ret = -EINVAL; + unsigned long gpa; + + if (offset >= PAGE_SIZE) + goto err; + + gpa = vgpu->shared_page_gpa + offset; + ret = intel_gvt_hypervisor_read_gpa(vgpu, gpa, buf, len); + if (!ret) + return ret; +err: + gvt_vgpu_err("read shared page (offset %x) failed", offset); + memset(buf, 0, len); + return ret; +} + +int intel_gvt_write_shared_page(struct intel_vgpu *vgpu, + unsigned int offset, void *buf, unsigned long len) +{ + int ret = -EINVAL; + unsigned long gpa; + + if (offset >= PAGE_SIZE) + goto err; + + gpa = vgpu->shared_page_gpa + offset; + ret = intel_gvt_hypervisor_write_gpa(vgpu, gpa, buf, len); + if (!ret) + return ret; +err: + gvt_vgpu_err("write shared page (offset %x) failed", offset); + memset(buf, 0, len); + return ret; +}