From patchwork Tue Jul 28 02:54:13 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Wang X-Patchwork-Id: 37665 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n6S2sGbX010842 for ; Tue, 28 Jul 2009 02:54:17 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 802709F01E; Mon, 27 Jul 2009 19:54:16 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 633EE9E752 for ; Mon, 27 Jul 2009 19:54:15 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 27 Jul 2009 19:41:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.43,280,1246863600"; d="asc'?scan'208";a="536445941" Received: from zhen-devel.sh.intel.com (HELO zhen-devel) ([10.239.13.48]) by orsmga001.jf.intel.com with ESMTP; 27 Jul 2009 19:53:49 -0700 Date: Tue, 28 Jul 2009 10:54:13 +0800 From: Zhenyu Wang To: yakui.zhao@intel.com Message-ID: <20090728025413.GA26751@zhen-devel.sh.intel.com> Mail-Followup-To: yakui.zhao@intel.com, eric@anholt.net, intel-gfx@lists.freedesktop.org References: <1248404344-14758-1-git-send-email-yakui.zhao@intel.com> MIME-Version: 1.0 In-Reply-To: <1248404344-14758-1-git-send-email-yakui.zhao@intel.com> User-Agent: Mutt/1.5.20 (2009-06-14) Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [Patch] DRM/I915: Calculate the DVO relative offset in LVDS data entry to get the DVO timing X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list Reply-To: Zhenyu Wang List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Mime-version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org On 2009.07.24 10:59:04 +0800, yakui.zhao@intel.com wrote: > From: Zhao Yakui A little fix for compiling warning and tested fine on IGDNG. Thanks. From 75a3756868de77fc1f084f1aebe509dd75c6ae82 Mon Sep 17 00:00:00 2001 From: Zhao Yakui Date: Tue, 28 Jul 2009 10:45:59 +0800 Subject: [PATCH] drm/i915: Fix to get DVO timing by proper offset Now the DVO timing in LVDS data entry is obtained by using the following step: a. get the entry size for every LVDS panel data b. Get the LVDS fp entry for the preferred panel type c. get the DVO timing by using entry->dvo_timing In our driver the entry->dvo_timing is related with the size of lvds_fp_timing. For example: the size is 46. But it seems that the size of lvds_fp_timing varies on the differnt platform. In such case we will get the incorrect DVO timing entry because of the incorrect DVO offset in LVDS panel data entry, e.g this also removes a hack on new IGDNG to get proper DVO timing. Calculate the DVO timing offset in LVDS data entry to get the DVO timing a. get the DVO timing offset in the LVDS fp data entry by using the pointer definition in LVDS data ptr b. get the LVDS data entry c. get the DVO timing by adding the DVO timing offset to data entry https://bugs.freedesktop.org/show_bug.cgi?id=22787 Signed-off-by: Zhao Yakui Tested-by: Zhenyu Wang --- drivers/gpu/drm/i915/intel_bios.c | 21 +++++++++++---------- 1 files changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 6be8df5..300aee3 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -97,14 +97,13 @@ static void parse_lfp_panel_data(struct drm_i915_private *dev_priv, struct bdb_header *bdb) { - struct drm_device *dev = dev_priv->dev; struct bdb_lvds_options *lvds_options; struct bdb_lvds_lfp_data *lvds_lfp_data; struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; struct bdb_lvds_lfp_data_entry *entry; struct lvds_dvo_timing *dvo_timing; struct drm_display_mode *panel_fixed_mode; - int lfp_data_size; + int lfp_data_size, dvo_timing_offset; /* Defaults if we can't find VBT info */ dev_priv->lvds_dither = 0; @@ -133,14 +132,16 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv, entry = (struct bdb_lvds_lfp_data_entry *) ((uint8_t *)lvds_lfp_data->data + (lfp_data_size * lvds_options->panel_type)); + dvo_timing_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - + lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; - /* On IGDNG mobile, LVDS data block removes panel fitting registers. - So dec 2 dword from dvo_timing offset */ - if (IS_IGDNG(dev)) - dvo_timing = (struct lvds_dvo_timing *) - ((u8 *)&entry->dvo_timing - 8); - else - dvo_timing = &entry->dvo_timing; + /* + * the size of fp_timing varies on the different platform. + * So calculate the DVO timing relative offset in LVDS data + * entry to get the DVO timing entry + */ + dvo_timing = (struct lvds_dvo_timing *) + ((unsigned char *)entry + dvo_timing_offset); panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);