diff mbox

drm/i915: split i915_powersave into separate flags

Message ID 20090914173131.5718b6e0@jbarnes-g45 (mailing list archive)
State Superseded
Headers show

Commit Message

Jesse Barnes Sept. 15, 2009, 12:31 a.m. UTC 
From 04a037dd3c480a43744164c252f899d33f6b3944 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Date: Mon, 14 Sep 2009 17:27:05 -0700
Subject: [PATCH] drm/i915: split power saving features

Allows for easy measurement.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_dma.c      |    2 +-
 drivers/gpu/drm/i915/i915_drv.c      |    2 +-
 drivers/gpu/drm/i915/i915_drv.h      |    5 +++++
 drivers/gpu/drm/i915/intel_display.c |    9 +++++----
 4 files changed, 12 insertions(+), 6 deletions(-)

Comments

Zhenyu Wang Sept. 15, 2009, 7:26 a.m. UTC | #1 
On 2009.09.14 17:31:31 -0700, Jesse Barnes wrote:
> >From 04a037dd3c480a43744164c252f899d33f6b3944 Mon Sep 17 00:00:00 2001
> From: Jesse Barnes <jbarnes@virtuousgeek.org>
> Date: Mon, 14 Sep 2009 17:27:05 -0700
> Subject: [PATCH] drm/i915: split power saving features
> 
> Allows for easy measurement.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_dma.c      |    2 +-
>  drivers/gpu/drm/i915/i915_drv.c      |    2 +-
>  drivers/gpu/drm/i915/i915_drv.h      |    5 +++++
>  drivers/gpu/drm/i915/intel_display.c |    9 +++++----
>  4 files changed, 12 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 8569e60..617a188 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1205,7 +1205,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
>  
>  	/* Try to set up FBC with a reasonable compressed buffer size */
>  	if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) &&
> -	    i915_powersave) {
> +	    (i915_powersave & I915_PM_FBC)) {
>  		int cfb_size;
>  
>  		/* Try to get an 8M buffer... */
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index dbe568c..c0953d6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -43,7 +43,7 @@ module_param_named(modeset, i915_modeset, int, 0400);
>  unsigned int i915_fbpercrtc = 0;
>  module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
>  
> -unsigned int i915_powersave = 1;
> +unsigned int i915_powersave = ~0;
>  module_param_named(powersave, i915_powersave, int, 0400);
>  
>  static struct drm_driver driver;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a174e5e..e77231e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -615,6 +615,11 @@ enum intel_chip_family {
>  extern struct drm_ioctl_desc i915_ioctls[];
>  extern int i915_max_ioctl;
>  extern unsigned int i915_fbpercrtc;
> +#define I915_PM_RENDER_CLOCK	(1<<0)
> +#define I915_PM_DISPLAY_CLOCK	(1<<1)
> +#define I915_PM_PLL_CLOCK	(1<<2)
> +#define I915_PM_SR		(1<<3)
> +#define I915_PM_FBC		(1<<4)
>  extern unsigned int i915_powersave;
>  
>  extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 421150a..714ce82 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1120,7 +1120,7 @@ static void intel_update_fbc(struct drm_crtc *crtc,
>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>  	int plane = intel_crtc->plane;
>  
> -	if (!i915_powersave)
> +	if (!(i915_powersave & I915_PM_FBC))
>  		return;
>  
>  	if (!dev_priv->display.fbc_enabled ||
> @@ -2416,7 +2416,7 @@ static void g4x_update_wm(struct drm_device *dev, int unused, int unused2,
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	u32 fw_blc_self = I915_READ(FW_BLC_SELF);
>  
> -	if (i915_powersave)
> +	if (i915_powersave & I915_PM_SR)
>  		fw_blc_self |= FW_BLC_SELF_EN;
>  	else
>  		fw_blc_self &= ~FW_BLC_SELF_EN;
> @@ -2958,7 +2958,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
>  		udelay(150);
>  	}
>  
> -	if (is_lvds && has_reduced_clock && i915_powersave) {
> +	if (is_lvds && has_reduced_clock &&
> +	    (i915_powersave & I915_PM_PLL_CLOCK)) {
>  		I915_WRITE(fp_reg + 4, fp2);
>  		intel_crtc->lowfreq_avail = true;
>  		if (HAS_PIPE_CXSR(dev)) {
> @@ -3733,7 +3734,7 @@ static void intel_idle_update(struct work_struct *work)
>  	struct drm_crtc *crtc;
>  	struct intel_crtc *intel_crtc;
>  
> -	if (!i915_powersave)
> +	if (!(i915_powersave & (I915_PM_RENDER_CLOCK | I915_PM_DISPLAY_CLOCK)))
>  		return;
>  
>  	mutex_lock(&dev->struct_mutex);
> -- 

No problem with your patch, but just think of, could we also make powersave
be runtime configable? Or is that already on your todo?
Jesse Barnes Sept. 15, 2009, 3:46 p.m. UTC | #2 
On Tue, 15 Sep 2009 15:26:55 +0800
Zhenyu Wang <zhenyuw@linux.intel.com> wrote:

> On 2009.09.14 17:31:31 -0700, Jesse Barnes wrote:
> > >From 04a037dd3c480a43744164c252f899d33f6b3944 Mon Sep 17 00:00:00
> > >2001
> > From: Jesse Barnes <jbarnes@virtuousgeek.org>
> > Date: Mon, 14 Sep 2009 17:27:05 -0700
> > Subject: [PATCH] drm/i915: split power saving features
> > 
> > Allows for easy measurement.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/i915_dma.c      |    2 +-
> >  drivers/gpu/drm/i915/i915_drv.c      |    2 +-
> >  drivers/gpu/drm/i915/i915_drv.h      |    5 +++++
> >  drivers/gpu/drm/i915/intel_display.c |    9 +++++----
> >  4 files changed, 12 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_dma.c
> > b/drivers/gpu/drm/i915/i915_dma.c index 8569e60..617a188 100644
> > --- a/drivers/gpu/drm/i915/i915_dma.c
> > +++ b/drivers/gpu/drm/i915/i915_dma.c
> > @@ -1205,7 +1205,7 @@ static int i915_load_modeset_init(struct
> > drm_device *dev, 
> >  	/* Try to set up FBC with a reasonable compressed buffer
> > size */ if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) ||
> > IS_GM45(dev)) &&
> > -	    i915_powersave) {
> > +	    (i915_powersave & I915_PM_FBC)) {
> >  		int cfb_size;
> >  
> >  		/* Try to get an 8M buffer... */
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c
> > b/drivers/gpu/drm/i915/i915_drv.c index dbe568c..c0953d6 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -43,7 +43,7 @@ module_param_named(modeset, i915_modeset, int,
> > 0400); unsigned int i915_fbpercrtc = 0;
> >  module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
> >  
> > -unsigned int i915_powersave = 1;
> > +unsigned int i915_powersave = ~0;
> >  module_param_named(powersave, i915_powersave, int, 0400);
> >  
> >  static struct drm_driver driver;
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > b/drivers/gpu/drm/i915/i915_drv.h index a174e5e..e77231e 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -615,6 +615,11 @@ enum intel_chip_family {
> >  extern struct drm_ioctl_desc i915_ioctls[];
> >  extern int i915_max_ioctl;
> >  extern unsigned int i915_fbpercrtc;
> > +#define I915_PM_RENDER_CLOCK	(1<<0)
> > +#define I915_PM_DISPLAY_CLOCK	(1<<1)
> > +#define I915_PM_PLL_CLOCK	(1<<2)
> > +#define I915_PM_SR		(1<<3)
> > +#define I915_PM_FBC		(1<<4)
> >  extern unsigned int i915_powersave;
> >  
> >  extern int i915_master_create(struct drm_device *dev, struct
> > drm_master *master); diff --git
> > a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c index 421150a..714ce82
> > 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++
> > b/drivers/gpu/drm/i915/intel_display.c @@ -1120,7 +1120,7 @@ static
> > void intel_update_fbc(struct drm_crtc *crtc, struct intel_crtc
> > *intel_crtc = to_intel_crtc(crtc); int plane = intel_crtc->plane;
> >  
> > -	if (!i915_powersave)
> > +	if (!(i915_powersave & I915_PM_FBC))
> >  		return;
> >  
> >  	if (!dev_priv->display.fbc_enabled ||
> > @@ -2416,7 +2416,7 @@ static void g4x_update_wm(struct drm_device
> > *dev, int unused, int unused2, struct drm_i915_private *dev_priv =
> > dev->dev_private; u32 fw_blc_self = I915_READ(FW_BLC_SELF);
> >  
> > -	if (i915_powersave)
> > +	if (i915_powersave & I915_PM_SR)
> >  		fw_blc_self |= FW_BLC_SELF_EN;
> >  	else
> >  		fw_blc_self &= ~FW_BLC_SELF_EN;
> > @@ -2958,7 +2958,8 @@ static int intel_crtc_mode_set(struct
> > drm_crtc *crtc, udelay(150);
> >  	}
> >  
> > -	if (is_lvds && has_reduced_clock && i915_powersave) {
> > +	if (is_lvds && has_reduced_clock &&
> > +	    (i915_powersave & I915_PM_PLL_CLOCK)) {
> >  		I915_WRITE(fp_reg + 4, fp2);
> >  		intel_crtc->lowfreq_avail = true;
> >  		if (HAS_PIPE_CXSR(dev)) {
> > @@ -3733,7 +3734,7 @@ static void intel_idle_update(struct
> > work_struct *work) struct drm_crtc *crtc;
> >  	struct intel_crtc *intel_crtc;
> >  
> > -	if (!i915_powersave)
> > +	if (!(i915_powersave & (I915_PM_RENDER_CLOCK |
> > I915_PM_DISPLAY_CLOCK))) return;
> >  
> >  	mutex_lock(&dev->struct_mutex);
> > -- 
> 
> No problem with your patch, but just think of, could we also make
> powersave be runtime configable? Or is that already on your todo?

We could, through debugfs or an ioctl (though I hadn't been planning
on it)... Do you want it just for testing?  Or for some sort of user
prefs app?
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 8569e60..617a188 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1205,7 +1205,7 @@  static int i915_load_modeset_init(struct drm_device *dev,
 
 	/* Try to set up FBC with a reasonable compressed buffer size */
 	if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) &&
-	    i915_powersave) {
+	    (i915_powersave & I915_PM_FBC)) {
 		int cfb_size;
 
 		/* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index dbe568c..c0953d6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -43,7 +43,7 @@  module_param_named(modeset, i915_modeset, int, 0400);
 unsigned int i915_fbpercrtc = 0;
 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
 
-unsigned int i915_powersave = 1;
+unsigned int i915_powersave = ~0;
 module_param_named(powersave, i915_powersave, int, 0400);
 
 static struct drm_driver driver;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a174e5e..e77231e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -615,6 +615,11 @@  enum intel_chip_family {
 extern struct drm_ioctl_desc i915_ioctls[];
 extern int i915_max_ioctl;
 extern unsigned int i915_fbpercrtc;
+#define I915_PM_RENDER_CLOCK	(1<<0)
+#define I915_PM_DISPLAY_CLOCK	(1<<1)
+#define I915_PM_PLL_CLOCK	(1<<2)
+#define I915_PM_SR		(1<<3)
+#define I915_PM_FBC		(1<<4)
 extern unsigned int i915_powersave;
 
 extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 421150a..714ce82 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1120,7 +1120,7 @@  static void intel_update_fbc(struct drm_crtc *crtc,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int plane = intel_crtc->plane;
 
-	if (!i915_powersave)
+	if (!(i915_powersave & I915_PM_FBC))
 		return;
 
 	if (!dev_priv->display.fbc_enabled ||
@@ -2416,7 +2416,7 @@  static void g4x_update_wm(struct drm_device *dev, int unused, int unused2,
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 fw_blc_self = I915_READ(FW_BLC_SELF);
 
-	if (i915_powersave)
+	if (i915_powersave & I915_PM_SR)
 		fw_blc_self |= FW_BLC_SELF_EN;
 	else
 		fw_blc_self &= ~FW_BLC_SELF_EN;
@@ -2958,7 +2958,8 @@  static int intel_crtc_mode_set(struct drm_crtc *crtc,
 		udelay(150);
 	}
 
-	if (is_lvds && has_reduced_clock && i915_powersave) {
+	if (is_lvds && has_reduced_clock &&
+	    (i915_powersave & I915_PM_PLL_CLOCK)) {
 		I915_WRITE(fp_reg + 4, fp2);
 		intel_crtc->lowfreq_avail = true;
 		if (HAS_PIPE_CXSR(dev)) {
@@ -3733,7 +3734,7 @@  static void intel_idle_update(struct work_struct *work)
 	struct drm_crtc *crtc;
 	struct intel_crtc *intel_crtc;
 
-	if (!i915_powersave)
+	if (!(i915_powersave & (I915_PM_RENDER_CLOCK | I915_PM_DISPLAY_CLOCK)))
 		return;
 
 	mutex_lock(&dev->struct_mutex);