From patchwork Fri Oct 16 18:03:26 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 54345 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n9GI3bAH031679 for ; Fri, 16 Oct 2009 18:03:37 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A02769EFEE; Fri, 16 Oct 2009 11:03:36 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from outbound-mail-04.bluehost.com (outbound-mail-04.bluehost.com [69.89.21.14]) by gabe.freedesktop.org (Postfix) with SMTP id AAC5C9E755 for ; Fri, 16 Oct 2009 11:03:34 -0700 (PDT) Received: (qmail 16384 invoked by uid 0); 16 Oct 2009 18:03:32 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by outboundproxy1.bluehost.com with SMTP; 16 Oct 2009 18:03:32 -0000 Received: from s10.itokyofl3.vectant.ne.jp ([202.231.68.10] helo=jbarnes-x200) by box514.bluehost.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69) (envelope-from ) id 1Myr9H-0004ud-Hg for intel-gfx@lists.freedesktop.org; Fri, 16 Oct 2009 12:03:32 -0600 Date: Sat, 17 Oct 2009 03:03:26 +0900 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Message-ID: <20091017030326.7f240290@jbarnes-x200> X-Mailer: Claws Mail 3.7.2 (GTK+ 2.18.1; x86_64-pc-linux-gnu) Mime-Version: 1.0 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 202.231.68.10 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] Fw: 2.6.32 regression (bisected): Video tearing/glitching with T400 laptops X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Received: from virtuous by box514.bluehost.com with local-bsmtp (Exim 4.69) (envelope-from ) id 1My9I5-000222-1X for jbarnes@virtuousgeek.org; Wed, 14 Oct 2009 13:13:41 -0600 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on box514.bluehost.com X-Spam-Level: X-Spam-Status: No, score=-6.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_MED shortcircuit=no autolearn=ham version=3.2.5 Received: from mga05.intel.com ([192.55.52.89] helo=fmsmga101.fm.intel.com) by box514.bluehost.com with esmtp (Exim 4.69) (envelope-from ) id 1My9I4-0001zV-9H for jbarnes@virtuousgeek.org; Wed, 14 Oct 2009 13:13:40 -0600 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 14 Oct 2009 12:07:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.44,560,1249282800"; d="scan'208";a="736384260" Received: from unknown (HELO localhost.localdomain) ([10.255.17.79]) by fmsmga001.fm.intel.com with ESMTP; 14 Oct 2009 12:16:28 -0700 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Cc: Chris Wilson , Jesse Barnes Subject: [PATCH] drm/i915: Install a fence register for fbc on g4x Date: Wed, 14 Oct 2009 20:12:46 +0100 Message-Id: <1255547566-9426-1-git-send-email-chris@chris-wilson.co.uk> X-Mailer: git-send-email 1.6.4.3 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:program running on server} To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson Cc: Jesse Barnes --- drivers/gpu/drm/i915/intel_display.c | 8 +++++--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1a40b9a..9dfb82f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1262,9 +1262,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, return ret; } - /* Pre-i965 needs to install a fence for tiled scan-out */ - if (!IS_I965G(dev) && - obj_priv->fence_reg == I915_FENCE_REG_NONE && + /* Install a fence for tiled scan-out. Pre-i965 always needs a fence, + * whereas 965+ only requires a fence if using framebuffer compression. + * For simplicity, we always install a fence as the cost is not that onerous. + */ + if (obj_priv->fence_reg == I915_FENCE_REG_NONE && obj_priv->tiling_mode != I915_TILING_NONE) { ret = i915_gem_object_get_fence_reg(obj); if (ret != 0) { -- 1.6.4.3