@@ -1628,7 +1628,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
if (dev_priv->mm.next_gem_seqno == 0)
dev_priv->mm.next_gem_seqno++;
- if (HAS_PIPE_CONTROL(dev)) {
+ if (HAS_PIPE_CONTROL(dev) && IS_IRONLAKE(dev)) {
u32 scratch_addr = dev_priv->seqno_gfx_addr + 128;
/*
@@ -1660,6 +1660,16 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
OUT_RING(seqno);
OUT_RING(0);
ADVANCE_LP_RING();
+ } else if (HAS_PIPE_CONTROL(dev)) {
+ /* Don't penalize non-ilk parts with the extra writes */
+ BEGIN_LP_RING(4);
+ OUT_RING(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE |
+ PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH |
+ PIPE_CONTROL_NOTIFY);
+ OUT_RING(dev_priv->seqno_gfx_addr | PIPE_CONTROL_GLOBAL_GTT);
+ OUT_RING(seqno);
+ OUT_RING(0);
+ ADVANCE_LP_RING();
} else {
BEGIN_LP_RING(4);
OUT_RING(MI_STORE_DWORD_INDEX);