From patchwork Mon Feb 7 21:46:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 538881 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p17LlNhx027312 for ; Mon, 7 Feb 2011 21:47:45 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B46E9E97C for ; Mon, 7 Feb 2011 13:47:23 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy3-pub.bluehost.com (oproxy3-pub.bluehost.com [69.89.21.8]) by gabe.freedesktop.org (Postfix) with SMTP id 989749E8AE for ; Mon, 7 Feb 2011 13:46:43 -0800 (PST) Received: (qmail 32580 invoked by uid 0); 7 Feb 2011 21:46:42 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy3.bluehost.com with SMTP; 7 Feb 2011 21:46:42 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=virtuousgeek.org; h=Received:Date:From:To:Subject:Message-ID:X-Mailer:Mime-Version:Content-Type:Content-Transfer-Encoding:X-Identified-User; b=KDDcIOmesgGh/7HAu298Pc6WXrk4TSdyaHHfg2HFyU1cThkxhN0d0hn5I8lrJt4WIQ8Z/3xjZpJjJWaFCs9WdLSPuyiQcpSUGAefLotbJ9cPOyyOOoI7Qbh3bRNNgkHa; Received: from c-67-174-193-198.hsd1.ca.comcast.net ([67.174.193.198] helo=jbarnes-desktop) by box514.bluehost.com with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69) (envelope-from ) id 1PmYuw-0001Ei-C6 for intel-gfx@lists.freedesktop.org; Mon, 07 Feb 2011 14:46:42 -0700 Date: Mon, 7 Feb 2011 13:46:40 -0800 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Message-ID: <20110207134640.3b0688d0@jbarnes-desktop> X-Mailer: Claws Mail 3.7.6 (GTK+ 2.18.9; x86_64-redhat-linux-gnu) Mime-Version: 1.0 X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.174.193.198 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [RFC] drm/i915: disable ports as needed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 07 Feb 2011 21:47:45 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cc431f4..a22483e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1626,6 +1626,72 @@ static void intel_disable_plane(struct drm_i915_private *dev_priv, intel_wait_for_vblank(dev_priv->dev, pipe); } +static void disable_pch_dp(struct drm_i915_private *dev_priv, + enum pipe pipe, int reg) +{ + u32 val; + u32 sel_pipe; + + val = I915_READ(reg); + sel_pipe = (val & DP_PIPEB_SELECT) >> 30; + if ((val & DP_PORT_EN) && sel_pipe == pipe) { + I915_WRITE(reg, val & ~DP_PORT_EN); + POSTING_READ(reg); + } +} + +static void disable_pch_hdmi(struct drm_i915_private *dev_priv, + enum pipe pipe, int reg) +{ + u32 val; + u32 sel_pipe; + + val = I915_READ(reg); + sel_pipe = (val & TRANSCODER_B) >> 30; + if ((val & PORT_ENABLE) && sel_pipe == pipe) { + I915_WRITE(reg, val & ~PORT_ENABLE); + POSTING_READ(reg); + } +} + +/* Disable any ports connected to this transcoder */ +static void intel_disable_pch_ports(struct drm_i915_private *dev_priv, + enum pipe pipe) +{ + int reg; + u32 val; + u32 sel_pipe; + + val = I915_READ(PCH_PP_CONTROL); + I915_WRITE(PCH_PP_CONTROL, val | PANEL_UNLOCK_REGS); + POSTING_READ(PCH_PP_CONTROL); + + disable_pch_dp(dev_priv, pipe, PCH_DP_B); + disable_pch_dp(dev_priv, pipe, PCH_DP_C); + disable_pch_dp(dev_priv, pipe, PCH_DP_D); + + reg = PCH_ADPA; + val = I915_READ(reg); + sel_pipe = (val & ADPA_TRANS_B_SELECT) >> 30; + if ((val & ADPA_DAC_ENABLE) && sel_pipe == pipe) { + I915_WRITE(reg, val & ~ADPA_DAC_ENABLE); + POSTING_READ(reg); + } + + reg = PCH_LVDS; + val = I915_READ(reg); + sel_pipe = (val & LVDS_PIPEB_SELECT) >> 30; + if ((val & LVDS_PORT_EN) && sel_pipe == pipe) { + I915_WRITE(reg, val & ~LVDS_PORT_EN); + POSTING_READ(reg); + udelay(100); + } + + disable_pch_hdmi(dev_priv, pipe, HDMIB); + disable_pch_hdmi(dev_priv, pipe, HDMIC); + disable_pch_hdmi(dev_priv, pipe, HDMID); +} + static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) { struct drm_device *dev = crtc->dev; @@ -2865,14 +2931,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) ironlake_fdi_disable(crtc); - if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { - temp = I915_READ(PCH_LVDS); - if (temp & LVDS_PORT_EN) { - I915_WRITE(PCH_LVDS, temp & ~LVDS_PORT_EN); - POSTING_READ(PCH_LVDS); - udelay(100); - } - } + intel_disable_pch_ports(dev_priv, pipe); intel_disable_transcoder(dev_priv, pipe);