From patchwork Sun Aug 12 18:21:57 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 1309971 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id ED96BDF280 for ; Sun, 12 Aug 2012 18:22:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C231E9EEA8 for ; Sun, 12 Aug 2012 11:22:16 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pb0-f49.google.com (mail-pb0-f49.google.com [209.85.160.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 0D2B59E946 for ; Sun, 12 Aug 2012 11:22:01 -0700 (PDT) Received: by pbbrq8 with SMTP id rq8so4934217pbb.36 for ; Sun, 12 Aug 2012 11:22:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=date:from:to:cc:subject:message-id:mime-version:content-type :content-disposition:user-agent:x-gm-message-state; bh=awXN/izE3fyq6DWC+7AUweStf/4Nru4HVIMGZAMfgqc=; b=QkMXdvl/6vZgSJ5DI13MEAew+1gP+a2cy89gEruAKuZNfaa1pkanTXo4Hn3kwkqeCH 4EYUF2zhQnB30suPJ82lTleauAU5FVuAEvdWMmqgo+QZW52fV0x+nedE2Lu013lJtXuP zA2umh7Q2Bpf7Nl1TCiLua1FaDW4oE2mAZ219RfMMTskrqtvpxNLwYE7odCpR9tYNUjK 7ThNxlOahNJxdFJgFtbYUVZ8uELkISK4b1ATB0fPPVsC5WAmBGFtade1WaHLt3YCpn7a GGndqVWuDURSC4yH4dqHsCkOSjWPNEY+/vicAvZ2S1k5flB37Ls9lAL/ftC34FpOH8wh 3/bw== Received: by 10.68.201.73 with SMTP id jy9mr14087631pbc.124.1344795721725; Sun, 12 Aug 2012 11:22:01 -0700 (PDT) Received: from localhost (c-67-168-183-230.hsd1.wa.comcast.net. [67.168.183.230]) by mx.google.com with ESMTPS id pg9sm3713863pbb.26.2012.08.12.11.21.59 (version=TLSv1/SSLv3 cipher=OTHER); Sun, 12 Aug 2012 11:22:00 -0700 (PDT) Date: Sun, 12 Aug 2012 11:21:57 -0700 From: Greg KH To: Daniel Vetter Message-ID: <20120812182157.GA1949@kroah.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-Gm-Message-State: ALoCoQkHUtrc5eYs+MHZ7CG+FLORqOQXKHNexlyKziWFCX6y02FRLxpBfAh2SgNpW9bGUUzrN8Gi Cc: Paulo Zanoni , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Eugeni Dodonov , intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] 3.6-rc1 breaks my laptop graphics (intel) X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Hi Daniel. The 3.6-rc1 kernel breaks my laptop, booting to a black screen when the i915 driver initializes itself. I bisected this down to commit 24ded204429fa0f5501d37c63ee35c555c0b75ee (drm/i915: properly enable the blc controller on the right pipe), and when I revert that, and also a4f32fc3a37e982fffce8ec583643990ff288419 (drm/i915: don't forget the PCH backlight registers) which depended on the first patch, my laptop works just fine. Below is the combined revert. Any thoughts? Any patch I can try out? thanks, greg k-h ------ Subject: drm/i915: revert 24ded204429fa0f5501d37c63ee35c555c0b75ee and a4f32fc3a37e982fffce8ec583643990ff288419 24ded204429fa0f5501d37c63ee35c555c0b75ee (drm/i915: properly enable the blc controller on the right pipe) breaks the boot for my laptop, so revert it, and a4f32fc3a37e982fffce8ec583643990ff288419 (drm/i915: don't forget the PCH backlight registers) which depended on it. Signed-off-by: Greg Kroah-Hartman diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 8435355..4e786f2 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -383,8 +383,7 @@ extern u32 intel_panel_get_max_backlight(struct drm_device *dev); extern u32 intel_panel_get_backlight(struct drm_device *dev); extern void intel_panel_set_backlight(struct drm_device *dev, u32 level); extern int intel_panel_setup_backlight(struct drm_device *dev); -extern void intel_panel_enable_backlight(struct drm_device *dev, - enum pipe pipe); +extern void intel_panel_enable_backlight(struct drm_device *dev); extern void intel_panel_disable_backlight(struct drm_device *dev); extern void intel_panel_destroy_backlight(struct drm_device *dev); extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index e05c0d3..6547904 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -71,7 +71,6 @@ static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector) static void intel_lvds_enable(struct intel_lvds *intel_lvds) { struct drm_device *dev = intel_lvds->base.base.dev; - struct intel_crtc *intel_crtc = to_intel_crtc(intel_lvds->base.base.crtc); struct drm_i915_private *dev_priv = dev->dev_private; u32 ctl_reg, lvds_reg, stat_reg; @@ -108,7 +107,7 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds) if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000)) DRM_ERROR("timed out waiting for panel to power on\n"); - intel_panel_enable_backlight(dev, intel_crtc->pipe); + intel_panel_enable_backlight(dev); } static void intel_lvds_disable(struct intel_lvds *intel_lvds) @@ -1079,14 +1078,35 @@ bool intel_lvds_init(struct drm_device *dev) goto failed; out: - /* - * Unlock registers and just - * leave them unlocked - */ if (HAS_PCH_SPLIT(dev)) { + u32 pwm; + + pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0; + + /* make sure PWM is enabled and locked to the LVDS pipe */ + pwm = I915_READ(BLC_PWM_CPU_CTL2); + if (pipe == 0 && (pwm & BLM_PIPE_B)) + I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~BLM_PWM_ENABLE); + if (pipe) + pwm |= BLM_PIPE_B; + else + pwm &= ~BLM_PIPE_B; + I915_WRITE(BLC_PWM_CPU_CTL2, pwm | BLM_PWM_ENABLE); + + pwm = I915_READ(BLC_PWM_PCH_CTL1); + pwm |= BLM_PCH_PWM_ENABLE; + I915_WRITE(BLC_PWM_PCH_CTL1, pwm); + /* + * Unlock registers and just + * leave them unlocked + */ I915_WRITE(PCH_PP_CONTROL, I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); } else { + /* + * Unlock registers and just + * leave them unlocked + */ I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); } diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index 10c7d39..7180cc8 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -287,24 +287,9 @@ void intel_panel_disable_backlight(struct drm_device *dev) dev_priv->backlight_enabled = false; intel_panel_actually_set_backlight(dev, 0); - - if (INTEL_INFO(dev)->gen >= 4) { - uint32_t reg, tmp; - - reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2; - - I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE); - - if (HAS_PCH_SPLIT(dev)) { - tmp = I915_READ(BLC_PWM_PCH_CTL1); - tmp &= ~BLM_PCH_PWM_ENABLE; - I915_WRITE(BLC_PWM_PCH_CTL1, tmp); - } - } } -void intel_panel_enable_backlight(struct drm_device *dev, - enum pipe pipe) +void intel_panel_enable_backlight(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; @@ -313,40 +298,6 @@ void intel_panel_enable_backlight(struct drm_device *dev, dev_priv->backlight_enabled = true; intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); - - if (INTEL_INFO(dev)->gen >= 4) { - uint32_t reg, tmp; - - reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2; - - - tmp = I915_READ(reg); - - /* Note that this can also get called through dpms changes. And - * we don't track the backlight dpms state, hence check whether - * we have to do anything first. */ - if (tmp & BLM_PWM_ENABLE) - return; - - if (dev_priv->num_pipe == 3) - tmp &= ~BLM_PIPE_SELECT_IVB; - else - tmp &= ~BLM_PIPE_SELECT; - - tmp |= BLM_PIPE(pipe); - tmp &= ~BLM_PWM_ENABLE; - - I915_WRITE(reg, tmp); - POSTING_READ(reg); - I915_WRITE(reg, tmp | BLM_PWM_ENABLE); - - if (HAS_PCH_SPLIT(dev)) { - tmp = I915_READ(BLC_PWM_PCH_CTL1); - tmp |= BLM_PCH_PWM_ENABLE; - tmp &= ~BLM_PCH_OVERRIDE_ENABLE; - I915_WRITE(BLC_PWM_PCH_CTL1, tmp); - } - } } static void intel_panel_init_backlight(struct drm_device *dev)